DEMO9S08DZ60 Freescale Semiconductor, DEMO9S08DZ60 Datasheet - Page 223

• Manufacturer Part Number: DEMO9S08DZ60
• Description: BOARD DEMO
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08DZ60

• Contents: Board, Cable, CD
• Processor To Be Evaluated: MC9S08DZ60
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08D
• Kit Contents: MC9S08DZ60 Board, Software, Cables, Connectors
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
12.3.1
The CANCTL0 register provides various control bits of the MSCAN module as described below.
Read: Anytime
Write: Anytime when out of initialization mode; exceptions are read-only RXACT and SYNCH, RXFRM
(which is set by the module only), and INITRQ (which is also writable in initialization mode).
Freescale Semiconductor
Reset:
W
Register Definition
R
MSCAN Control Register 0 (CANCTL0)
TXCAN
RXFRM
CAN_H
The CANCTL0 register, except WUPE, INITRQ, and SLPRQ, is held in the
reset state when the initialization mode is active (INITRQ = 1 and
INITAK = 1). This register is writable again as soon as the initialization
mode is exited (INITRQ = 0 and INITAK = 0).
0
7
CAN node 1
CAN Controller
Transceiver
(MSCAN)
MCU
= Unimplemented
RXACT
Figure 12-4. MSCAN Control Register 0 (CANCTL0)
6
0
CAN_L
RXCAN
MC9S08DZ60 Series Data Sheet, Rev. 4
CSWAI
CAN Bus
Figure 12-3. CAN System
0
5
CAN node 2
NOTE
SYNCH
4
0
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
TIME
0
3
CAN node n
WUPE
2
0
SLPRQ
0
1
INITRQ
0
1
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