DEMO9S08DZ60 Freescale Semiconductor, DEMO9S08DZ60 Datasheet - Page 228

BOARD DEMO

DEMO9S08DZ60

Manufacturer Part Number
DEMO9S08DZ60
Description
BOARD DEMO
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of DEMO9S08DZ60

Contents
Board, Cable, CD
Processor To Be Evaluated
MC9S08DZ60
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08D
Kit Contents
MC9S08DZ60 Board, Software, Cables, Connectors
Rohs Compliant
Yes
For Use With/related Products
MC9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
12.3.4
The CANBTR1 register configures various CAN bus timing parameters of the MSCAN module.
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
1
228
TSEG2[2:0]
TSEG1[3:0]
In this case, PHASE_SEG1 must be at least 2 time quanta (Tq).
SAMP
Field
6:4
3:0
7
Reset:
W
R
BRP5
MSCAN Bus Timing Register 1 (CANBTR1)
Sampling — This bit determines the number of CAN bus samples taken per bit time.
0 One sample per bit.
1 Three samples per bit
If SAMP = 0, the resulting bit value is equal to the value of the single bit positioned at the sample point. If
SAMP = 1, the resulting bit value is determined by using majority rule on the three total samples. For higher bit
rates, it is recommended that only one sample is taken per bit time (SAMP = 0).
Time Segment 2 — Time segments within the bit time fix the number of clock cycles per bit time and the location
of the sample point (see
Table
Time Segment 1 — Time segments within the bit time fix the number of clock cycles per bit time and the location
of the sample point (see
Table
0
0
0
0
1
:
SAMP
0
7
12-7.
12-8.
BRP4
0
0
0
0
1
:
Figure 12-7. MSCAN Bus Timing Register 1 (CANBTR1)
TSEG22
Table 12-6. CANBTR1 Register Field Descriptions
BRP3
6
0
0
0
0
0
1
:
Table 12-5. Baud Rate Prescaler
1
Figure
Figure
.
MC9S08DZ60 Series Data Sheet, Rev. 4
BRP2
TSEG21
0
0
0
0
1
:
12-43). Time segment 2 (TSEG2) values are programmable as shown in
12-43). Time segment 1 (TSEG1) values are programmable as shown in
0
5
BRP1
0
0
1
1
1
:
TSEG20
4
0
BRP0
Description
0
1
0
1
1
:
TSEG13
0
3
Prescaler value (P)
TSEG12
64
2
0
1
2
3
4
:
TSEG11
Freescale Semiconductor
0
1
TSEG10
0
0

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