P0304 Terasic Technologies Inc, P0304 Datasheet - Page 32

• Manufacturer Part Number: P0304
• Description: DE2-70 CALL FOR ACADEMIC PRICING
• Manufacturer: Terasic Technologies Inc
• Type: FPGAr

Specifications of P0304

• Contents: DE2-70 Board, Power Supply, Cables, Plastic cover and software
• For Use With/related Products: Cyclone II 2C70
• For Use With: P0033 - BOARD ADAPTER HSMC TO GPIOP0006 - BOARD ADAPTER THDB-SUMP0001 - MODULE DIGITAL CAMERA 5MP (D5M)P0307 - KIT DEV 4.3" LCD TOUCH PANEL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DE2-70

The control flow for video displaying is described below:
The control flow for video capturing is described below:
1.
2.
3.
4.
1.
2.
3.
4.
Hardware
Blaster
JTAG
Host computer downloads the raw image data to SDRAM-U2.
Host issues a “display” command to Nios II processor.
Nios II processor interprets the command received and moves the raw image data from
the SDRAM to SSRAM through the Multi-Port SSRAM controller.
VGA Controller continuously reads the raw image data from the SSRAM and sends them
to the VGA port.
Host computer issues a “capture” command to Nios II processor.
Nios II processor interprets the command and controls Video-In controller to capture the
raw image data into the SSRAM. After capturing is done, Nios II processor copies the raw
image data from the SSRAM to SDRAM-U2.
Host computer reads the raw image data from the SDRAM-U2
Host computer converts the raw image data to RGB color space and displays it.
FPGA
SOPC
NIOS II
TIMER
JTAG
Figure 4.4. Video Capture Block Diagram.
29
Controller
Controller
MM Slave
SDRAM
SDRAM
Avalon
Multi - Port
VIDEO-In
Controller
Controller
Controller
SSRAM
VGA
DE2-70 User Manual
SDRAM-U1
SDRAM-U2
VIDEO IN
Program
SSRAM
NIOS II
VGA