R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 11
![KIT DEV FOR SH7203](/photos/9/24/92406/r0k572030s000be_sml.jpg)
R0K572030S000BE
Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K572030S000BE
Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
I
The fast speeds that SuperH devices provide would
not be usable by portable applications if the chips’
power dissipation was excessive. Therefore, Renesas
has designed the RISC and RISC/DSP devices in
low-power
low-voltage capabilities. Low static operating current
is achieved in all circuit designs; low dynamic (peak)
currents are guaranteed by logic and circuit design.
• Power-reducing techniques used in cache design
• Software-controlled power-reduction mechanisms:
• Hardware acceleration further reduces power consumption
I
Renesas meets the dual needs for compact devices and
low system cost by providing a broad choice of on-chip
memories and peripherals in the SuperH series.
• Large size and high performance on-chip memory: Up to
• 4- to 12-channel DMAC, 2 to 5 SCIs, 16-bit and
1MB on-chip flash memory, up to 128KB on-chip RAM,
and up to 32KB instruction and 32KB data cache
32-bit timers (3 to 34 channels), up to 149 I/O ports,
RTC, analog interfaces (4 to 32 channels), I
CAN (up to 2 channels), others
Balanced power/performance
High integration
– The sense amplifiers utilize SRAM circuit-design techniques
– A unique cache-way-enable circuit minimizes power demands by
– Each device family offers a selection of power-reduction
– Low operating and standby currents for longer battery life.
– Video, imaging, graphics, and security engines significantly
that reduce word-line voltage swings; this permits lower
currents to be used without sacrificing speed
turning on the sense amplifiers only in that portion of the cache
that has a “hit” in a given access; this reduces the cache data
array's operating current by 75%
techniques from a palette that includes Standby and Sleep
modes, clock-speed control and selective module shutdown
improve computational speeds while minimizing power
consumption
sub-micron
CMOS
TOP REASONS TO SELECT SuperH
processes
2
C,
with
Top Reasons To Select SuperH
• All SuperH-series processors feature direct
I
The SuperH architecture has a superior performance-
to-price ratio (Dhrystone MIPS/$). The architecture’s
16-bit RISC instruction set reduces system memory
requirements, which lowers the overall cost of
embedded system designs.
I
• The SuperH Family of processors with Floating Point Unit
• The SH-4 FPU is ideal for computer graphics and
interfaces to external memories. The on-chip Bus State
Controller, via the external bus, provides the specialized
inputs, outputs and functions for different types, widths,
and speeds of external memory (8/16/32-bit interfaces to
DRAM, SDRAM, DDR-SDRAM, flash, ROM, etc.)
(SH-2A, SH-4, SH-4A) and DSP (SH2-DSP, SH3-DSP,
SH-Mobile) support allow users to achieve more with
less, reducing overall system cost and power consumption
can be utilized to efficiently implement multimedia
and networking operations
Best cost/performance
Superior floating point and DSP support
SH2-DSP Signal Processing Performance
JPEG image compression/expansion
processing performance:
SH2-DSP
• 10 times higher than SH-1
• 3 times higher than SH-3
20 MHz
28 MHz
60 MHz
60 MHz
SH-1
SH-2
SH-3
JPEG compression processing time
(in seconds)
0
0.55
1
1.56
2
3
Image size (VGA): 640x480
24-bit full color
Y: Cr: Cb = 4: 2: 2
Compression ratio: 1/10
3.36
4
5
5.3