C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 19

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C8051F320-TB

Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F320-TB

Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
Program memory consists of 16 kB of Flash. This memory may be reprogrammed in-system in 512 byte
sectors, and requires no special off-chip programming voltage. See Figure 1.4 for the MCU system mem-
ory map.
XTAL1
XTAL2
On-Chip Memory
Oscillator
Oscillator
Multiplier
External
Internal
Clock
Drive
Px.x
Px.x
Figure 1.3. On-Chip Clock and Reset
System
Clock
Clock Select
Comparator 0
+
-
Detector
Missing
Clock
(one-
shot)
Microcontroller
EN
Extended Interrupt
C0RSEF
CIP-51
Core
Handler
VDD
WDT
PCA
EN
Rev. 1.4
Supply
Monitor
+
-
System Reset
Enable
Software Reset (SWRSF)
Power On
Reset
Operation
FLASH
Errant
Controller
'0'
USB
C8051F320/1
(wired-OR)
Transition
VBUS
Reset
Funnel
/RST
19

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