C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 50
C8051F320-TB
Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F320-TB
Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F320/1
5.4.
The ADC Programmable Window Detector continuously compares the ADC0 conversion results to user-
programmed limits, and notifies the system when a desired condition is detected. This is especially effec-
tive in an interrupt-driven system, saving code space and CPU bandwidth while delivering faster system
response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be used in
polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH, ADC0LTL)
registers hold the comparison values. The window detector flag can be programmed to indicate when mea-
sured data is inside or outside of the user-programmed limits, depending on the contents of the ADC0
Less-Than and ADC0 Greater-Than registers.
The Window Detector registers must be written with the same format (left/right justified, signed/unsigned)
as that of the current ADC configuration (left/right justified, single-ended/differential).
50
Bits7–0: High byte of ADC0 Greater-Than Data Word.
Bits7–0: Low byte of ADC0 Greater-Than Data Word.
R/W
Bit7
R/W
Bit7
Programmable Window Detector
SFR Definition 5.8.
SFR Definition 5.7.
R/W
Bit6
R/W
Bit6
R/W
Bit5
R/W
Bit5
ADC0GTH: ADC0 Greater-Than Data High Byte
ADC0GTL: ADC0 Greater-Than Data Low Byte
R/W
Bit4
R/W
Bit4
Rev. 1.4
R/W
Bit3
R/W
Bit3
R/W
Bit2
R/W
Bit2
R/W
Bit1
R/W
Bit1
R/W
Bit0
R/W
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0xC4
0xC3
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