MC56F8323EVME Freescale Semiconductor, MC56F8323EVME Datasheet - Page 32

BOARD EVALUATION MC56F8323

MC56F8323EVME

Manufacturer Part Number
MC56F8323EVME
Description
BOARD EVALUATION MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of MC56F8323EVME

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
to increase or decrease capacitance. Upon power-up, the default value of this trim is 512 units. Each unit
added or deleted changes the output frequency by about 0.1%, allowing incremental adjustment until the
desired frequency accuracy is achieved.
The internal oscillator is calibrated at the factory to 8MHz and the TRIM value is stored in the Flash
information block and loaded to the FMOPT1 register at reset. When using the relaxation oscillator, the
boot code should read the FMOPT1 register and set this value as OSCTL TRIM. For further information,
see the 56F8300 Peripherals User Manual.
3.4 Internal Clock Operation
At reset, both oscillators will be powered up; however, the relaxation oscillator will be the default clock
reference for the PLL. Software should power down the block not being used and program the PLL for the
correct frequency.
32
EXTAL
XTAL
Crystal
OSC
÷ (1, 2, 4, 8)
Prescaler
CLK_MODE
PLLCID
Figure 3-4 Internal Clock Operation
56F8323 Technical Data, Rev. 17
Relaxation
MUX
x (1 to 128)
OSC
Detector
PLLDB
Lock
PLL
F
OUT
PRECS
÷ 2
Reference
F
Detector
OUT
Loss of
Clock
/2
÷ (1, 2, 4, 8)
Postscaler
Bus Interface
PLLCOD
& Control
loss of reference
clock interrupt
LCK
Postscaler CLK
ZSRC
Freescale Semiconductor
SYS_CLK2
source to
the SIM
Interface
Bus
Preliminary

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