MC56F8323EVME Freescale Semiconductor, MC56F8323EVME Datasheet - Page 94

BOARD EVALUATION MC56F8323

MC56F8323EVME

Manufacturer Part Number
MC56F8323EVME
Description
BOARD EVALUATION MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of MC56F8323EVME

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.5.9.2
Each bit controls clocks to the indicated peripheral.
6.5.9.3
Each bit controls clocks to the indicated peripheral.
6.5.9.4
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
6.5.9.5
Each bit controls clocks to the indicated peripheral.
6.5.9.6
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
6.5.9.7
Each bit controls clocks to the indicated peripheral.
6.5.9.8
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
6.5.9.9
Each bit controls clocks to the indicated peripheral.
6.5.9.10
Each bit controls clocks to the indicated peripheral.
94
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
Analog-to-Digital Converter A Enable (ADCA)—Bit 13
FlexCAN Enable (CAN)—Bit 12
Reserved—Bit 11
Decoder 0 Enable (DEC0)—Bit 10
Reserved—Bit 9
Quad Timer C Enable (TMRC)—Bit 8
Reserved—Bit 7
Quad Timer A Enable (TMRA)—Bit 6
Serial Communications Interface 1 Enable (SCI1)—Bit 5
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary

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