ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 18

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
PS024410-0108
Port 0
Table 7. I/O Port Control Registers
12-Bit Bank 8-Bit Register Description Mnemonic
000
002
003
0F6
0F7
0F8
F00
Port 0 is an 8-bit, bidirectional, CMOS-compatible port. Its eight I/O lines are configured
under software control to create a nibble I/O port. The output drivers are push/pull or
open-drain, controlled by bit 2 of the PCON register.
If one or both nibbles are required for I/O operation, they must be configured by writing to
the Port 0 Mode Register (P01M). After a hardware reset or a Stop Mode Recovery, Port 0
is configured as an input port.
Port 0, bit 7 is used as the transmit output of the UART when UART Tx is enabled.The I/O
function of Port 0, bit 7 is overridden by the UART serial output (TxD) when UART Tx is
enabled (UCTL[7] = 1). The pin must be configured as an output for TxD data to reach the
pin (P0M[6] = 0).
An optional pull-up transistor is available as an OTP option on all Port 0 bits with nibble
select. For information on configuration, see
Address (Hex)
0–3
0–3
0–3
All
All
All
F
00
02
03
F6
F7
F8
00
Port 0
Port 2
Port 3
Port 2 Mode Register
Port 3 Mode Register
Port 0 Mode Register
Port Configuration
Register
P R E L I M I N A R Y
P0
P2
P3
P2M
P3M
P01M
PCON
Figure 4
on page 13.
Reset
XXh
XXh
0Xh
FFh
XXXX_X000b24
X1
XXXX_X1X0b20
XX_XXX1b20
Product Specification
I/O Port Pin Functions
Page
No
21
23
25
22
12

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