ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 98

• Manufacturer Part Number: ZLP128ICE01ZEM
• Description: EMULATOR CRIMZON Z8 ZLP12840
• Manufacturer: Zilog

Specifications of ZLP128ICE01ZEM

• Interface Type: RS-232, Ethernet, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3829

Table 45. Interrupt Mask Register (IMR)
PS024410-0108
Bit
Field
Reset
R/W
Address
Bit
Position
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Interrupt Mask Register
Value Description
Master Interrupt
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
Bits [5:0] are used to enable the interrupt. Bit 7 is the status of the master interrupt. When
reset, all interrupts are disabled. When writing a 1 to bit 7, you must also execute the EI
instruction to enable interrupts
Enable
R/W
Master Interrupt Enable
Use only the DI and EI instructions to alter this bit. Always disable interrupts (DI
instruction) before writing this register.
All interrupts are disabled.
Interrupts are enabled/disabled individually in bits [5:0].
Reserved
Reads are undefined; writes must be 0.
Disables IRQ5.
Enables IRQ5.
Disables IRQ4.
Enables IRQ4.
Disables IRQ3.
Enables IRQ3.
Disables IRQ2.
Enables IRQ2.
Disables IRQ1.
Enables IRQ1.
Disables IRQ0.
Enables IRQ0.
7
0
Reserved
—
X
6
Bank Independent: FBh; Linear: 0FBh
P R E L I M I N A R Y
Enable
IRQ5
R/W
X
5
(Table
45).
Enable
IRQ4
R/W
X
4
Enable
IRQ3
R/W
X
3
Enable
IRQ2
R/W
X
2
Product Specification
ZLP12840 OTP MCU
Enable
IRQ1
R/W
X
1
Enable
Interrupts
IRQ0
R/W
X
0
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