ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 83

• Manufacturer Part Number: ZLP128ICE01ZEM
• Description: EMULATOR CRIMZON Z8 ZLP12840
• Manufacturer: Zilog

Specifications of ZLP128ICE01ZEM

• Interface Type: RS-232, Ethernet, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3829

Table 36. Counter/Timer 8 Control Register (CTR0)
Bit
Field
Reset
R/W
Address
PS024410-0108
Bit
Position
[7]
[6]
[5]
[4:3]
[2]
Note:
Value Description
Read
Write
T8_Enable
00
01
10
11
0
1
0
1
0
1
0
1
0
1
Ensure to manipulate CTR0, bit 5 and CTR1, bits 0 and 1 (DEMODULATION mode)
when using the OR or AND commands. These instructions use a Read-Modify-Write
sequence in which the current status from the CTR0 and CTR1 registers is ORed or
ANDed with the designated value and then written back into the registers.
Example: When the status of bit 5 is 1, a timer reset condition occurs.
R/W
7
0
T8_Enable—Disable/enable the T8 counter.
Disable counter.
Enable counter. Configure T8 properly before enabling it.
SINGLE-PASS/MODULO-N
MODULO-N mode—Counter reloads the initial value when terminal count is reached.
SINGLE-PASS mode—Counter stops when the terminal count is reached.
Time_Out—This bit is set when the T8 terminal count is reached.
No counter time-out occurs.
Counter time-out occurred.
No effect.
Reset Flag to 0. Software must reset this Flag before using counter/timers.
T8 _Clock—Select the T8 input clock frequency.
These bits are not reset upon Stop Mode Recovery.
SCLK.
SCLK ÷ 2.
SCLK ÷ 4.
SCLK ÷ 8.
Capture_INT_Mask—Disable/enable interrupt when data is captured into either LO8
or HI8 upon a positive or negative edge detection in DEMODULATION mode.
This bit is not reset upon Stop Mode Recovery.
Disable data capture interrupt.
Enable data capture interrupt.
Modulo-N
Single/
R/W
6
0
Time_Out T8 _Clock
P R E L I M I N A R Y
R/W
5
0
Bank D: 00h; Linear: D00h
R/W R/W
4
0
3
0
Capture_INT_M
R/W
ask
2
0
Counter_INT_M
Product Specification
R/W
ask
1
0
P34_Out
R/W
0
0
Timers
77