ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 22

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
ZLP12840 OTP MCU
Product Specification
16
Register; such reads always return a value of 1. Also, when in ANALOG mode, P31
cannot be used as a Stop Mode Recovery source because in STOP mode, the comparator is
disabled, and its output will not toggle. The programming of Bit 2 of the P3M register
takes precedence over the programming of Bit 1 in determining the function of P31. If
both bits are set, P31 functions as an IR learning amplifier instead of an analog
comparator. The output of the function selected for P31 can be used as a source for IRQ2
interrupt assertion (see
Figure 6
on page 15). The IRQ2 interrupt can be configured to be
based upon detecting a rising, falling, or edge-triggered input change using bit 6 and bit 7
of the IRQ register. The P31 output stage signal also goes to the Counter/Timer edge
detection circuitry similar to P20.
P32 can be used as an interrupt, analog comparator, UART receiver, normal digital input
and as a Stop Mode Recovery source. When bit 6 of UCTL is set, P32 functions as a
receive input for the UART. When bit 1 of the P3M Register is set, thereby placing the part
into ANALOG mode, P32 functions as an analog comparator, Comp2. The reference
voltage for Comp2 is P33 (P
2). P32 can be used as a rising, falling or edge-triggered
REF
interrupt, IRQ0, using IRQ register bits 6 and 7. If UART receiver interrupts are not
enabled, the UART receive interrupt is used as the source of interrupts for IRQ0 instead of
P32. When in ANALOG mode P32 cannot be used as a Stop Mode Recovery source
because the comparators are turned OFF in STOP mode.
When in ANALOG mode, P33 cannot be read through bit 3 of the Port 3 Register as a
digital input by the CPU. In this case, a read of bit 3 of the Port 3 Register indicates
whether a Stop Mode Recovery condition exists. Reading a value of 0 indicates that a Stop
Mode Recovery condition does exist; if the ZLP12840 MCU is presently in STOP mode,
it will exit STOP mode. Reading a value of 1 indicates that no condition exists to remove
the ZLP12840 from STOP mode. Additionally, when in ANALOG mode, P33 cannot be
used as an interrupt source. Instead, the existence of a Stop Mode Recovery condition can
generate an interrupt, if enabled. P33 can be used as a falling-edge interrupt, IRQ1, when
not in ANALOG mode. IRQ1 is also used as the UART T
interrupt and the UART BRG
X
interrupt. Only one source is active at a time. If bits 7 and 5 of UCTL are set to 1, IRQ1
will transmit an interrupt when the Transmit Shift Register is empty. If bits 0 and 5 of
UCTL are set to 1 and bit 6 of UCTL is cleared to 0, the BRG interrupts will activate
IRQ1.
Note:
Comparators and the IR amplifier are powered down by entering STOP mode. For
P30:P33 to be used as a Stop Mode Recovery source during STOP mode, these inputs
must be placed into DIGITAL mode. When in ANALOG mode, do not configure any Port 3
input as a Stop Mode Recovery source. The configuration of these inputs must be re-ini-
tialized after Stop Mode Recovery or Power-On Reset.
PS024410-0108
P R E L I M I N A R Y
I/O Port Pin Functions

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