PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 90

• Manufacturer Part Number: PIC18F1320-I/SO
• Description: IC MCU FLASH 4KX16 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F1220/1320
FIGURE 10-2:
FIGURE 10-3:
DS39605C-page 88
RA6 Enable
Data
Bus
RD LATA
WR LATA
or
PORTA
WR
TRISA
RD
TRISA
ECIO or
RCIO
Enable
RD PORTA
Note 1:
Note 1:
RD LATA
Data
Bus
WR LATA
or
PORTA
WR TRISA
Analog
Input
Mode
RD TRISA
RD PORTA
To A/D Converter and LVD Modules
I/O pins have protection diodes to V
I/O pins have protection diodes to V
TRIS Latch
Data Latch
D
D
CK
CK
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF
RA3:RA0 PINS
BLOCK DIAGRAM OF
OSC2/CLKO/RA6 PIN
Q
Q
EN
D
DD
DD
EN
V
V
D
N
P
and V
SS
DD
V
and V
V
P
N
SS
DD
Schmitt
Trigger
Input
Buffer
SS
I/O pin
SS
I/O pin
Schmitt
Trigger
Input
Buffer
.
.
(1)
(1)
FIGURE 10-4:
FIGURE 10-5:
RD
TRISA
RA7 Enable
Data
Bus
RD LATA
WR LATA
or
PORTA
WR
TRISA
RA7
Enable
RD PORTA
Note 1:
Note 1:
RD LATA
Data
Bus
WR LATA
or
PORTA
WR TRISA
RD TRISA
RD PORTA
TMR0 Clock Input
I/O pins have protection diodes to V
I/O pins have protection diodes to V
TRIS Latch
Data Latch
D
D
CK
CK
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
BLOCK DIAGRAM OF
RA4/T0CKI PIN
BLOCK DIAGRAM OF
OSC1/CLKI/RA7 PIN
Q
Q
Q
Q
 2004 Microchip Technology Inc.
Q
Q
EN
EN
Schmitt
Trigger
Input
Buffer
D
DD
DD
V
EN
N
D
SS
To Oscillator
and V
and V
V
V
P
N
SS
DD
SS
SS
I/O pin
I/O pin
Schmitt
Trigger
Input
Buffer
.
.
(1)
(1)