MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 240

IC MCU FLASH 8BIT 8K 20-DIP

MC68HC908JB8JPE

Manufacturer Part Number
MC68HC908JB8JPE
Description
IC MCU FLASH 8BIT 8K 20-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB8JPE

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
HC08
No. Of I/o's
13
Ram Memory Size
256Byte
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
USB
Rohs Compliant
Yes
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USB
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Computer Operating Properly (COP)
15.4.4 Power-On Reset
15.4.5 Internal Reset
15.4.6 Reset Vector Fetch
15.4.7 COPD (COP Disable)
15.4.8 COPRS (COP Rate Select)
Technical Data
240
Address:
Reset:
The power-on reset (POR) circuit in the SIM clears the COP prescaler
4096 OSCXCLK cycles after power-up.
An internal reset clears the SIM counter and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG).
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register (CONFIG).
Read:
Write:
$001F
Bit 7
Computer Operating Properly (COP)
0
0
Figure 15-2. Configuration Register (CONFIG)
= Unimplemented
6
0
0
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
URSTD
5
0
LVID
4
0
SSREC
3
0
COPRS
2
0
Freescale Semiconductor
STOP
1
0
COPD
Bit 0
0

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