MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 55

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.4 FLASH Control Register
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
Address:
The FLASH control register (FLCR) controls FLASH program and erase
operations.
HVEN — High Voltage Enable Bit
MASS — Mass Erase Control Bit
ERASE — Erase Control Bit
PGM — Program Control Bit
Reset:
Read:
Write:
This read/write bit enables high voltage from the charge pump to the
memory for either program or erase operation. It can only be set if
either PGM or ERASE is high and the sequence for erase or
program/verify is followed.
This read/write bit configures the memory for mass erase operation or
block erase operation when the ERASE bit is set.
This read/write bit configures the memory for erase operation. This bit
and the PGM bit should not be set to 1 at the same time.
This read/write bit configures the memory for program operation. This
bit and the ERASE bit should not be set to 1 at the same time.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
1 = Mass Erase operation selected
0 = Block Erase operation selected
1 = Erase operation selected
0 = Erase operation not selected
1 = Program operation selected
0 = Program operation not selected
$FE08
Bit 7
0
0
Figure 4-2. FLASH Control Register (FLCR)
FLASH Memory
6
0
0
5
0
0
4
0
0
HVEN
3
0
MASS
2
0
FLASH Control Register
ERASE
FLASH Memory
1
0
Technical Data
PGM
Bit 0
0
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