MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 250

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Break Module (BREAK)
17.6.2 Break Address Registers
17.6.3 Break Status Register
Technical Data
250
Address:
Address:
BRKA — Break Active Bit
The break address registers contain the high and low bytes of the
desired breakpoint address. Reset clears the break address registers.
The break status register (BSR) contains a flag to indicate that a break
caused an exit from stop or wait mode. This status bit is useful in
applications requiring a return to wait or stop mode after exiting from a
break interrupt.
Reset:
Reset:
Read:
Write:
Read:
Write:
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
$FE0C
$FE0D
Figure 17-4. Break Address Register High (BRKH)
Bit 15
Figure 17-5. Break Address Register Low (BRKL)
Bit 7
Bit 7
Bit 7
0
0
1 = Break address match
0 = No break address match
Break Module (BREAK)
14
6
0
6
6
0
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
13
5
0
5
5
0
12
4
0
4
4
0
11
3
0
3
3
0
Freescale Semiconductor
10
2
0
2
2
0
1
9
0
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0