MCIMX512CJM6C Freescale Semiconductor, MCIMX512CJM6C Datasheet - Page 125

• Manufacturer Part Number: MCIMX512CJM6C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512CJM6C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

4.7.12.1 Reset Sequence
4.7.12.1.1
The sequence of reset for this kind of SIM Cards is as follows (see
4.7.12.1.2
The sequence of reset for this kind of card is as follows (see
Freescale Semiconductor
SIMx_DATAy_RX_TX
SIMx_SVENy
SIMx_CLKy
•
•
•
•
•
•
•
•
After power up, the clock signal is enabled on SIMx_CLKy(time T0)
After 200 clock cycles, RX must be high.
The card must send a response on RX acknowledging the reset between 400 and 40000 clock
cycles after T0.
After power-up, the clock signal is enabled on SIMx_CLKy (time T0)
After 200 clock cycles, SIMx_DATAy_RX_TX must be high.
SIMx_RSTy must remain Low for at least 40000 clock cycles after T0 (no response is to be
received on RX during those 40000 clock cycles)
SIMx_RSTy is set High (time T1)
SIMx_RSTy must remain High for at least 40000 clock cycles after T1 and a response must be
received on SIMx_DATAy_RX_TX between 400 and 40000 clock cycles after T1.
Cards with internal reset
Cards with Active Low Reset
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
T0
1
Figure 84. Internal-Reset Card Reset Sequence
2
response
400 clock cycles <
Figure
Figure
85):
84):
1
2
Electrical Characteristics
< 200 clock cycles
< 40000 clock cycles
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