MCIMX512CJM6C Freescale Semiconductor, MCIMX512CJM6C Datasheet - Page 21

MULTIMEDIA PROC 529-LFBGA

MCIMX512CJM6C

Manufacturer Part Number
MCIMX512CJM6C
Description
MULTIMEDIA PROC 529-LFBGA
Manufacturer
Freescale Semiconductor
Series
i.MX51r
Datasheets

Specifications of MCIMX512CJM6C

Core Processor
ARM Cortex-A8
Core Size
32-Bit
Speed
600MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.8 V ~ 1.15 V
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
529-LFBGA
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Processor Series
i.MX51
Core
ARM Cortex A8
Data Bus Width
32 bit
Program Memory Size
36 KB
Data Ram Size
128 KB
Interface Type
I2C, SPI, SSI, UART, USB
Maximum Clock Frequency
200 MHz
Number Of Timers
5
Operating Supply Voltage
0.8 V to 1.15 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
MCIMX51EVKJ
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
4
5
6
7
4.1.1
Table 15
Table 16
Freescale Semiconductor
1
2
JTAG: TCK Operating Frequency
Stop Mode
eFuse Program Current.
Current required to program one eFuse bit: The associated
VDD_FUSE supply per
CKIL: Operating Frequency
CKIH: Operating Frequency
XTAL Oscillator
• External reference clocks
• Power gating for ARM and
• Stop mode voltage
In Read mode, Freescale recommends VDD_FUSE be floated or grounded. Tying VDD_FUSE to a positive supply
(3.0 V–3.3 V) increases the possibility of inadvertently blowing fuses and is not recommended.
The NAND Flash supplies are composed of three groups: A, B, and C. Each group can be powered with a different supply
voltage. For example, NVCC_NANDF_A = 1.8 V, NVCC_NANDF_B = 3.0 V, NVCC_NANDF_C = 2.7 V.
The analog supplies should be isolated in the application design. Use of series inductors is recommended.
Operation of the HS-I
The read current of approximately 5 mA is derived from the DDR supply (NVCC_EMI_DRAM).
The current I
gated
processing units
Parameter Description
shows the fuse supply current.
shows the current core consumption (not including I/O) of the i.MX51.
Supply Current
Mode
program
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
is only required during program time.
2
C and I
Table
2
Table 16. i.MX51 Stop Mode Current and Power Consumption
Description
13.
2
C is not guaranteed when operated between the supply voltages of 1.95 to 2.7 V.
VDDGP = 0.85 V, VCC = 0.95 V, VDDA = 0.95 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled
USBPHY PLL off
External (MHz) crystal and on-chip oscillator
powered down (SBYOS bit asserted)
No external resistive loads that cause current flow
Standby voltage allowed (VSTBY bit is asserted)
T
A
= 25 °C
Symbol
f
Table 15. Fuse Supply Current
f
f
f
ckih
xtal
ckil
Table 14. Interface Frequency
tck
See
See
See
CKIH2)," on page 47
Condition
Table 47, "CAMP Electrical Parameters (CKIH1,
Table 99, "JTAG Timing," on page 129
Table 74, "FPM Specifications," on page 79
Min
22
Symbol
I
program
1
Min
NVCC_OSC
Max
VDDGP
27
Supply
VDDA
VCC
Total
Typ
60
Electrical Characteristics
Nominal
0.012
Max
120
0.18
0.35
0.15
0.66
MHz
MHz
MHz
Unit
kHz
Unit
Unit
mW
mA
mA
21

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