XC2V2000-4FGG676C Xilinx Inc, XC2V2000-4FGG676C Datasheet - Page 186

• Manufacturer Part Number: XC2V2000-4FGG676C
• Description: FPGA Virtex-II™ Family 2M Gates 24192 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 676-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-IIr

Specifications of XC2V2000-4FGG676C

• Package: 676FBGA
• Family Name: Virtex-II™
• Device Logic Units: 24192
• Device System Gates: 2000000
• Number Of Registers: 21504
• Maximum Internal Frequency: 650 MHz
• Typical Operating Supply Voltage: 1.5 V
• Maximum Number Of User I/os: 456
• Ram Bits: 1032192
• Number Of Labs/clbs: 2688
• Total Ram Bits: 1032192
• Number Of I /o: 456
• Number Of Gates: 2000000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1351

FF896 Flip-Chip Fine-Pitch BGA Package
As shown in
BGA package. Pins in the XC2V1000, XC2V1500, and XC2V2000 devices are the same, except for the pin differences in the
XC2V1000 and XC2V1500 devices shown in the No Connect columns. Following this table are the
Fine-Pitch BGA Package Specifications (1.00mm
Table 11: FF896 BGA — XC2V1000, XC2V1500, and XC2V2000
DS031-4 (v3.5) November 5, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
Table
IO_L04N_0/VREF_0
IO_L21P_0/VREF_0
IO_L51P_0/VREF_0
IO_L03N_0/VRP_0
IO_L03P_0/VRN_0
Pin Description
11, XC2V1000, XC2V1500, and XC2V2000 Virtex-II devices are available in the FF896 flip-chip fine-pitch
IO_L01N_0
IO_L01P_0
IO_L02N_0
IO_L02P_0
IO_L04P_0
IO_L05N_0
IO_L05P_0
IO_L06N_0
IO_L06P_0
IO_L19N_0
IO_L19P_0
IO_L20N_0
IO_L20P_0
IO_L21N_0
IO_L22N_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L49N_0
IO_L49P_0
IO_L50N_0
IO_L50P_0
IO_L51N_0
IO_L52N_0
IO_L52P_0
Pin Number
C26
C25
C24
D25
G22
G21
D24
D23
H21
H20
C23
C22
B27
A27
F24
E24
A26
A25
F23
F22
A24
B25
B23
B24
E22
E23
A22
B22
F21
F20
B20
B21
pitch).
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No Connect in the XC2V1000
Virtex-II Platform FPGAs: Pinout Information
No Connect in the XC2V1500
FF896 Flip-Chip
Module 4 of 4
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