XC2V2000-4FGG676C Xilinx Inc, XC2V2000-4FGG676C Datasheet - Page 30

• Manufacturer Part Number: XC2V2000-4FGG676C
• Description: FPGA Virtex-II™ Family 2M Gates 24192 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 676-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-IIr

Specifications of XC2V2000-4FGG676C

• Package: 676FBGA
• Family Name: Virtex-II™
• Device Logic Units: 24192
• Device System Gates: 2000000
• Number Of Registers: 21504
• Maximum Internal Frequency: 650 MHz
• Typical Operating Supply Voltage: 1.5 V
• Maximum Number Of User I/os: 456
• Ram Bits: 1032192
• Number Of Labs/clbs: 2688
• Total Ram Bits: 1032192
• Number Of I /o: 456
• Number Of Gates: 2000000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1351

Table 15: Dual-Port Mode Configurations
DS031-2 (v3.5) November 5, 2007
Product Specification
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Figure 29: 18 Kbit Block SelectRAM Memory in
R
DIP
ADDR
WE
EN
SSR
DI
CLK
18 Kbit Block SelectRAM
512 x 36
512 x 36
16K x 1
16K x 1
1K x 18
1K x 18
Single-Port Mode
8K x 2
8K x 2
4K x 4
4K x 4
2K x 9
2K x 9
DOP
512 x 36
16K x 1
1K x 18
1K x 18
8K x 2
8K x 2
4K x 4
4K x 4
2K x 9
2K x 9
DO
DS031_10_071602
www.xilinx.com
512 x 36
16K x 1
1K x 18
4K x 4
8K x 2
2K x 9
4K x 4
2K x 9
Dual-Port Configuration
As a dual-port RAM, each port of block SelectRAM has
access to a common 18 Kbit memory resource. These are
fully synchronous ports with independent control signals for
each port. The data widths of the two ports can be config-
ured independently, providing built-in bus-width conversion.
Table 15
ports A and B.
If both ports are configured in either 2K x 9-bit, 1K x 18-bit,
or 512 x 36-bit configurations, the 18 Kbit block is accessi-
ble from port A or B. If both ports are configured in either
16K x 1-bit, 8K x 2-bit. or 4K x 4-bit configurations, the
16 K-bit block is accessible from Port A or Port B. All other
configurations result in one port having access to an 18 Kbit
memory block and the other port having access to a 16 K-bit
subset of the memory block equal to 16 Kbits.
Virtex-II Platform FPGAs: Functional Description
illustrates the different configurations available on
512 x 36
16K x 1
1K x 18
2K x 9
8K x 2
4K x 4
512 x 36
16K x 1
1K x 18
8K x 2
512 x 36
16K x 1
Module 2 of 4
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