DP83846AVHG63SN National Semiconductor, DP83846AVHG63SN Datasheet - Page 2
DP83846AVHG63SN
Manufacturer Part Number
DP83846AVHG63SN
Description
Manufacturer
National Semiconductor
Datasheet
1.DP83846AVHG63SN.pdf
(60 pages)
Specifications of DP83846AVHG63SN
Lead Free Status / RoHS Status
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CONFIGURATION
(AN_EN, AN0, AN1)
(PAUSE_EN)
(LED_CFG, PHYAD)
PARALLEL TO
SCRAMBLER
NRZ TO NRZI
HARDWARE
BINARY TO
ENCODER
ENCODER
ENCODER
SERIAL
PINS
TRANSMIT CHANNELS &
4B/5B
MLT-3
TX_DATA
100 Mb/s
STATE MACHINES
10/100 COMMON
OUTPUT DRIVER
TD±
GENERATOR
TX_DATA
10 Mb/s
MANCHESTER
LINK PULSE
ENCODER
TRANSMIT
NRZ TO
FILTER
Figure 1. Block Diagram of the 10/100 DSP based core.
DRIVERS
LEDS
LED
TX_CLK
MANAGEMENT
MII INTERFACE/CONTROL
AUTO-NEGOTIATION
NEGOTIATION
PCS CONTROL
PHY ADDRESS
STATE MACHINE
SERIAL
BASIC MODE
SYSTEM CLOCK
100BASE-TX
GENERATION
CONTROL
REGISTERS
REFERENCE
10BASE-T
CLOCK
AUTO
MII
2
MII
RX_CLK
DESCRAMBLER
CODE GROUP
NRZI TO NRZ
RECOVERY
ALIGNMENT
SERIAL TO
DECODER
PARALLEL
DECODER
DECODER
MLT-3 TO
CLOCK
BINARY
AND EQ
RX_DATA
4B/5B
COMP
RECEIVE CHANNELS &
ADAPTIVE
BLW
100 Mb/s
STATE MACHINES
10/100 COMMON
INPUT BUFFER
RD±
RX_CLK
MANCHESTER
10 Mb/s
LINK PULSE
RECOVERY
DETECTOR
DECODER
SQUELCH
RECEIVE
TO NRZ
CLOCK
FILTER
SMART
RX_DATA
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