DP83846AVHG63SN National Semiconductor, DP83846AVHG63SN Datasheet - Page 7

• Manufacturer Part Number: DP83846AVHG63SN
• Manufacturer: National Semiconductor

Specifications of DP83846AVHG63SN

• Lead Free Status / RoHS Status: Not Compliant

1.5 LED Interface
1.6 Strapping Options/Dual Purpose Pins
A 5 k
change the default strap option. If the default option is
required, then there is no need for external pull-up or pull
down resistors, since the internal pull-up or pull down resis-
LED_DPLX/PHYAD0
LED_COL/PHYAD1
LED_GDLNK/PHYAD2
LED_TX/PHYAD3
LED_RX/PHYAD4
LED_SPEED
LED_DPLX/PHYAD0
LED_COL/PHYAD1
LED_GDLNK/PHYAD2
LED_TX/PHYAD3
LED_RX/PHYAD4
Signal Name
Signal Name
resistor should be used for pull-down or pull-up to
Type
S, O
S, O
S, O
S, O
S, O
Type
S, O
O
LQFP Pin #
LQFP Pin #
33
32
31
30
29
28
33
32
31
30
29
FULL DUPLEX LED STATUS: Indicates Full-Duplex status.
COLLISION LED STATUS: Indicates Collision activity in Half Duplex
mode.
GOOD LINK LED STATUS: Indicates Good Link Status for 10BASE-
T and 100BASE-TX.
TRANSMIT LED STATUS: Indicates transmit activity. LED is on for
activity, off for no activity.
RECEIVE LED STATUS: Indicates receive activity. LED is on for ac-
tivity, off for no activity.
SPEED LED STATUS: Indicates link speed; high for 100 Mb/s, low
for 10 Mb/s.
PHY ADDRESS [4:0]: The DP83846A provides five PHY address
pins, the state of which are latched into the PHYCTRL register at
system Hardware-Reset.
The DP83846A supports PHY Address strapping values 0
(<00000>) through 31 (<11111>). PHY Address 0 puts the part
into the MII Isolate Mode. The MII isolate mode must be selected
by strapping Phy Address 0; changing to Address 0 by register
write will not put the Phy in the MII isolate mode.
The status of these pins are latched into the PHY Control Register
during Hardware-Reset. (Please note these pins have no internal
pull-up or pull-down resistors and they must be strapped high or low
using 5 k resistors.)
7
tors will set the default value. Please note that the
PHYAD[0:4] pins have no internal pull-ups or pull-downs
and they must be strapped. Since these pins may have
alternate functions after reset is deasserted, they should
not be connected directly to Vcc or GND.
Description
Description
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