FW82801BA S L4HM Intel, FW82801BA S L4HM Datasheet - Page 441

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FW82801BA S L4HM

Manufacturer Part Number
FW82801BA S L4HM
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801BA S L4HM

Lead Free Status / RoHS Status
Not Compliant
11.1.17
11.1.18
11.1.19
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
CAP—Capabilities Pointer Register
(SATA–D31:F2)
Address Offset:
Default Value:
INT_LN—Interrupt Line Register
(SATA–D31:F2)
Address Offset:
Default Value:
INT_PN—Interrupt Pin Register
(SATA–D31:F2)
Address Offset:
Default Value:
Bit
7:0
Bit
7:0
Bit
7:3
2:0
Capabilities Pointer (CAP_PTR) — RO. This bit indicates that the first capability pointer is set to 00h
and therefore is not pointing to anything (i.e., disabled).
Interrupt Line — R/W. This field is used to communicate to software the interrupt line that the
interrupt pin is connected to.
Reserved
Interrupt Pin — RO. Hardwired to 01h indicating to “software” that the Intel
Note that this is only used in native mode. Also note that the routing to the internal interrupt
controller doesn’t necessarily relate to the value in this register.
34h
00h
3Ch
00h
3Dh
01h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
SATA Controller Registers (D31:F2)
RO
8 bits
R/W
8 bits
RO
8 bits
®
ICH5 will drive INTA#.
441

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