FW82801EB Intel, FW82801EB Datasheet - Page 230

no-image

FW82801EB

Manufacturer Part Number
FW82801EB
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801EB

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FW82801EB
Manufacturer:
INTEL
Quantity:
20 000
Part Number:
FW82801EB SL73Z
Manufacturer:
INTEL
Quantity:
238
Part Number:
FW82801EB(SL73Z)
Manufacturer:
INTEL
Quantity:
20 000
Functional Description
5.20.10.1.3
230
Enabling the Debug Port
There are two mutually exclusive conditions that debug software must address as part of its startup
processing:
Debug software can determine the current ‘initialized’ state of the EHCI by examining the
Configure Flag in the EHCI USB 2.0 Command Register. If this flag is set, then system software
has initialized the EHCI. Otherwise the EHCI should not be considered initialized. Debug software
will initialize the debug port registers depending on the state the EHCI. However, before this can
be accomplished, debug software must determine which root USB port is designated as the debug
port.
Determining the Debug Port
Debug software can easily determine which USB root port has been designated as the debug port
by examining bits 20:23 of the EHCI Host Controller Structural Parameters register. This 4-bit
field represents the numeric value assigned to the debug port (i.e., 0000=port 0).
Debug Software Startup with Non-Initialized EHCI
Debug software can attempt to use the debug port if after setting the OWNER_CNT bit, the
Current Connect Status bit in the appropriate (See Determining the Debug Port) PORTSC register
is set. If the Current Connect Status bit is not set, then debug software may choose to terminate or it
may choose to wait until a device is connected.
If a device is connected to the port, then debug software must reset/enable the port. Debug software
does this by setting and then clearing the Port Reset bit the PORTSC register. To guarantee a
successful reset, debug software should wait at least 50 ms before clearing the Port Reset bit. Due
to possible delays, this bit may not change to 0 immediately; reset is complete when this bit reads
as 0. Software must not continue until this bit reads 0.
If a high-speed device is attached, the EHCI will automatically set the Port Enabled/Disabled bit in
the PORTSC register and the debug software can proceed. Debug software should set the
ENABLED_CNT bit in the Debug Port Control/Status register, and then reset (clear) the Port
Enabled/Disabled bit in the PORTSC register (so that the system host controller driver does not see
an enabled port when it is first loaded).
Debug Software Startup with Initialized EHCI
Debug software can attempt to use the debug port if the Current Connect Status bit in the
appropriate (See Determining the Debug Port) PORTSC register is set. If the Current Connect
Status bit is not set, then debug software may choose to terminate or it may choose to wait until a
device is connected.
If a device is connected, then debug software must set the OWNER_CNT bit and then the
ENABLED_CNT bit in the Debug Port Control/Status register.
Determining Debug Peripheral Presence
After enabling the debug port functionality, debug software can determine if a debug peripheral is
attached by attempting to send data to the debug peripheral. If all attempts result in an error
(Exception bits in the Debug Port Control/Status register indicates a Transaction Error), then the
attached device is not a debug peripheral. If the debug port peripheral is not present, then debug
software may choose to terminate or it may choose to wait until a debug peripheral is connected.
Debug Software
The EHCI has been initialized by system software
The EHCI has not been initialized by system software
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet

Related parts for FW82801EB