MC9S08SH4CTG Freescale, MC9S08SH4CTG Datasheet - Page 103

• Manufacturer Part Number: MC9S08SH4CTG
• Manufacturer: Freescale

Specifications of MC9S08SH4CTG

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 256Byte
• # I/os (max): 13
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 4KB
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
BCC rel
BCLR n,opr8a
BCS rel
BEQ rel
BGE rel
BGND
BGT rel
BHCC rel
BHCS rel
BHI rel
BHS rel
BIH rel
BIL rel
BIT #opr8i
BIT opr8a
BIT opr16a
BIT oprx16,X
BIT oprx8,X
BIT ,X
BIT oprx16,SP
BIT oprx8,SP
BLE rel
BLO rel
BLS rel
BLT rel
BMC rel
BMI rel
BMS rel
BNE rel
Source
Form
Branch if Carry Bit Clear
(if C = 0)
Clear Bit n in Memory
(Mn ← 0)
Branch if Carry Bit Set (if C = 1)
(Same as BLO)
Branch if Equal (if Z = 1)
Branch if Greater Than or Equal To
(if N ⊕ V = 0) (Signed)
Enter active background if ENBDM=1
Waits for and processes BDM commands
until GO, TRACE1, or TAGGO
Branch if Greater Than (if Z | (N ⊕ V) = 0)
(Signed)
Branch if Half Carry Bit Clear (if H = 0)
Branch if Half Carry Bit Set (if H = 1)
Branch if Higher (if C | Z = 0)
Branch if Higher or Same (if C = 0)
(Same as BCC)
Branch if IRQ Pin High (if IRQ pin = 1)
Branch if IRQ Pin Low (if IRQ pin = 0)
Bit Test
(A) & (M)
(CCR Updated but Operands Not Changed)
Branch if Less Than or Equal To
(if Z | (N ⊕ V) = 1) (Signed)
Branch if Lower (if C = 1) (Same as BCS)
Branch if Lower or Same (if C | Z = 1)
Branch if Less Than (if N ⊕ V = 1) (Signed)
Branch if Interrupt Mask Clear (if I = 0)
Branch if Minus (if N = 1)
Branch if Interrupt Mask Set (if I = 1)
Branch if Not Equal (if Z = 0)
Table 7-2. Instruction Set Summary (Sheet 2 of 9)
Operation
MC9S08SH8 MCU Series Data Sheet, Rev. 3
REL
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
REL
REL
REL
INH
REL
REL
REL
REL
REL
REL
REL
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
REL
REL
REL
REL
REL
REL
REL
REL
Object Code
9E D5
9E E5
24 rr
11
13
15
17
19
1B
1D
1F
25 rr
27 rr
90 rr
82
92 rr
28 rr
29 rr
22 rr
24 rr
2F rr
2E rr
A5
B5
C5
D5
E5
F5
93 rr
25 rr
23 rr
91 rr
2C rr
2B rr
2D rr
26 rr
dd
dd
dd
dd
dd
dd
dd
dd
ii
dd
hh ll
ee ff
ff
ee ff
ff
Chapter 7 Central Processor Unit (S08CPUV2)
5+
3
5
5
5
5
5
5
5
5
3
3
3
3
3
3
3
3
3
3
2
3
4
4
3
3
5
4
3
3
3
3
3
3
3
3
ppp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
ppp
ppp
ppp
fp...ppp
ppp
ppp
ppp
ppp
ppp
ppp
ppp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
ppp
ppp
ppp
ppp
ppp
ppp
ppp
ppp
Cyc-by-Cyc
Details
V 1 1 H I N Z C
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
0 1 1 – – ↕ ↕ –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
– 1 1 – – – – –
on CCR
Affect
103