MC9S08SH4CTG Freescale, MC9S08SH4CTG Datasheet - Page 16

• Manufacturer Part Number: MC9S08SH4CTG
• Manufacturer: Freescale

Specifications of MC9S08SH4CTG

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 256Byte
• # I/os (max): 13
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 4KB
• Lead Free Status / RoHS Status: Compliant

Section Number
15.5 Functional Description ..................................................................................................................234
16.1 Introduction ...................................................................................................................................239
16.2 Signal Description .........................................................................................................................244
16.3 Register Definition ........................................................................................................................248
16.4 Functional Description ..................................................................................................................254
16.5 Reset Overview .............................................................................................................................260
16.6 Interrupts .......................................................................................................................................260
16.7 The Differences from TPM v2 to TPM v3 ....................................................................................262
17.1 Introduction ...................................................................................................................................267
17.2 Background Debug Controller (BDC) ..........................................................................................268
16
15.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................231
15.4.4 SPI Status Register (SPIS) ..............................................................................................232
15.4.5 SPI Data Register (SPID) ................................................................................................233
15.5.1 SPI Clock Formats ..........................................................................................................234
15.5.2 SPI Interrupts ..................................................................................................................237
15.5.3 Mode Fault Detection .....................................................................................................237
16.1.1 ACMP/TPM Configuration Information .........................................................................239
16.1.2 TPM Configuration Information .....................................................................................239
16.1.3 Features ...........................................................................................................................241
16.1.4 Modes of Operation ........................................................................................................241
16.1.5 Block Diagram ................................................................................................................242
16.2.1 Detailed Signal Descriptions ...........................................................................................244
16.3.1 TPM Status and Control Register (TPMxSC) ................................................................248
16.3.2 TPM-Counter Registers (TPMxCNTH:TPMxCNTL) ....................................................249
16.3.3 TPM Counter Modulo Registers (TPMxMODH:TPMxMODL) ....................................250
16.3.4 TPM Channel n Status and Control Register (TPMxCnSC) ..........................................251
16.3.5 TPM Channel Value Registers (TPMxCnVH:TPMxCnVL) ..........................................253
16.4.1 Counter ............................................................................................................................255
16.4.2 Channel Mode Selection .................................................................................................256
16.5.1 General ............................................................................................................................260
16.5.2 Description of Reset Operation .......................................................................................260
16.6.1 General ............................................................................................................................260
16.6.2 Description of Interrupt Operation ..................................................................................260
17.1.1 Forcing Active Background ............................................................................................267
17.1.2 Features ...........................................................................................................................268
17.2.1 BKGD Pin Description ...................................................................................................269
Timer Pulse-Width Modulator (S08TPMV3)
MC9S08SH8 MCU Series Data Sheet, Rev. 3
Development Support
Chapter 16
Chapter 17
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Freescale Semiconductor
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