82V2608BB IDT, Integrated Device Technology Inc, 82V2608BB Datasheet - Page 13

• Manufacturer Part Number: 82V2608BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2608BB

• Utopia Level: Level 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Pin Count: 208
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Table-1 Pin Description (Continued)
IDT82V2608
PIN DESCRIPTION
RxAddr4
RxAddr3
RxAddr2
RxAddr1
RxAddr0
RxData7
RxData6
RxData5
RxData4
RxData3
RxData2
RxData1
RxData0
RxSOC
RxClav
TSCK8
TSCK7
TSCK6
TSCK5
TSCK4
TSCK3
TSCK2
TSCK1
Name
TSD8
TSD7
TSD6
TSD5
TSD4
TSD3
TSD2
TSD1
TSF8
TSF7
TSF6
TSF5
TSF4
TSF3
TSF2
TSF1
Pin Number
C14
C15
C16
D13
D14
A15
B14
A14
C13
B13
A13
D12
C12
B16
B15
R10
P10
T10
T11
R3
R4
R5
R6
R7
R8
R9
P9
P4
P5
P6
P7
P8
T3
T4
T5
T6
T7
T8
T9
Input/Output
High-Z
High-Z
High-Z
O
O
O
O
I
I
I
RxAddr[4:0]: Utopia Receive Address
Utopia receive port address driven from the ATM layer to poll and select an appropriate port.
The RxAddr[4:0] input bus are sampled on the rising edge of RxClk.
RxData[7:0]: Utopia Receive Data
Utopia 8-bit data bus driven from the IDT82V2608 to the ATM layer.
The RxData[7:0] output bus are updated on the rising edge of RxClk.
RxClav: Utopia Receive Cell Available
Utopia cell available signal. A polled port drives RxClav only during each cycle following one with its
address on the RxAddr lines. The polled port asserts RxClav high to indicate its corresponding FIFO
has a complete cell available for transfer to the ATM layer, otherwise it deasserts the signal.
The RxClav output is updated on the rising edge of RxClk.
Note: This pin requires a pull-down resistor.
RxSOC: Utopia Receive Start of Cell
Utopia start of cell pulse. It will be driven high when RxData[7:0] contain the first valid byte of a cell.
The RxSOC input is updated on the rising edge of RxClk.
TSDn: Transmit Side Data Output
TSDn contains the transmit data for the n-th link.
The TSDn output is updated on the rising edge of TSCKn or TSCCK if common clock is used.
TSCKn: Transmit Side Clock
TSCKn contains the transmit clock for the n-th link.
Note: If unused, TSCKn should be connected to ground.
TSFn: Transmit Side Frame pulse
TSFn is used to delineate each frame for the n-th link.
The TSFn input is sampled on the falling edge of TSCKn or TSCCK if common clock is used.
Note: If unused, TSFn should be connected to ground.
T1/E1 Line Interface
13
Description
Inverse Multiplexing for ATM
December 4, 2006