82V2608BB IDT, Integrated Device Technology Inc, 82V2608BB Datasheet - Page 96

• Manufacturer Part Number: 82V2608BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2608BB

• Utopia Level: Level 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Pin Count: 208
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

FIFO_INT_RESET_REG register ....................................................... 26
FIFO_STATE_REG register ............................................................... 26
G
G.802 mapping ................................................................................... 20
GetConfigPara command ................................................................... 63
GetGroupDelayInfo command ............................................................ 58
GetGroupState command .................................................................. 57
GetGrpPerf command ........................................................................ 60
GetGrpWorkingPara command .......................................................... 64
GetLinkPerf command ........................................................................ 61
GetLinkState command ...................................................................... 59
GetLinkWorkingPara command ......................................................... 65
GetLoopedTestPattern command ...................................................... 67
GetVersionInfo command ............................................................ 68
global signals ...................................................................................... 12
glossary .............................................................................................. 91
group auto detect
GroupInitial command ........................................................................ 79
GR-Timing-Mismatch ......................................................................... 72
GR-UAS-IMA ...................................................................................... 71
H
HCS_ERR_TC ............................................................................ 61
I
IMA frame ........................................................................................... 30
IMA initialization ................................................................................. 69
IMA mode ........................................................................................... 30
IMA operation ..................................................................................... 69
IMAOS08 ...............................................................................24
IMAOS08_Slave ....................................................................24
inhibit a group ..................................................................................... 70
InhibitGrp command .................................................................... 50
INPUT_FIFO_DATA_REG register .................................................... 25
INPUT_FIFO_INTERNAL_STATE_REG register .............................. 27
INPUT_FIFO_LENGTH_REG register ............................................... 25
Insufficient-Links ................................................................................. 72
Insufficient-Links-FE ........................................................................... 72
Intel
interface
invalid ICP .......................................................................................... 71
IV-IMA ......................................................................................... 61
IDT82V2608
Index
master side ................................................................................. 73
slave side ................................................................................... 73
microprocessor interface timing .................................................. 87
JTAG & Scan .............................................................................. 80
JTAG & Scan interface ............................................................... 16
line interface ........................................................................ 13
microprocessor ........................................................................... 24
microprocessor interface ............................................................ 14
SRAM interface ................................................................... 15
Utopia interface .......................................................................... 18
,
,
27
27
,
,
,
,
,
,
,
,
78
71
73
73
70
19
29
71
96
J
JTAG & Scan interface ................................................................16
JTAG instructions ............................................................................... 80
L
LCD .................................................................................................... 72
LIF ...................................................................................................... 72
line interface .................................................................................13
line interface timing ............................................................................ 84
line interface timing clock mode ......................................................... 23
line interface Work Mode
link backup ......................................................................................... 30
LODS ................................................................................................. 72
loopback ............................................................................................. 23
M
mapping
master side ........................................................................................ 73
maximum delay tolerance .................................................................. 29
microprocessor interface ..............................................................14
microprocessor interface timing
missing ICP ........................................................................................ 71
mode
Motorola
multi-rate ............................................................................................ 22
N
not inhibit a group .............................................................................. 70
NotInhibitGrp command ...............................................................51
external loopback ....................................................................... 23
internal loopback ........................................................................ 23
loopback ..................................................................................... 23
timing clock mode ...................................................................... 23
mode0 ........................................................................................ 20
mode1~mode4 ........................................................................... 20
mode11 ...................................................................................... 22
mode12 and mode13 ................................................................. 22
mode14 and mode15 ................................................................. 23
mode5 and mode6 ..................................................................... 22
mode7~mode10 ......................................................................... 22
line interface ............................................................................... 23
Utopia loopback ......................................................................... 18
G.802 mapping .......................................................................... 20
spaced mapping ......................................................................... 21
SRAM size ................................................................................. 29
Intel ............................................................................................ 87
Motorola ..................................................................................... 85
IMA mode ................................................................................... 30
UNI mode ................................................................................... 30
microprocessor interface timing ................................................. 85
external loopback ............................................................... 23
internal loopback ................................................................ 23
Inverse Multiplexing for ATM
December 4, 2006
,
,
,
,
80
19
24
70