82V2608BB IDT, Integrated Device Technology Inc, 82V2608BB Datasheet - Page 22

• Manufacturer Part Number: 82V2608BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2608BB

• Utopia Level: Level 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Pin Count: 208
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

T1 ISDN Mode
transmit data, that is, T1 data is not transmitted during the framing bit
and time slot 24. Therefore, only 23 time slots are considered useful and
are mapped while time slot 24 and the framing bit are meaningless and
are not mapped.
T1 Normal Mode
24 time slots are useful.
3.2.1.3 Mode5~Mode6
the line interface timing clock is 1.544 MHz (T1 clock). The ISDN mode
and normal mode are defined in
page
or independent clock. If common clock is used, TSCCK and RSCCK are
used as Tx clock and Rx clock respectively, and TSCFS and RSCFS are
used as common frame pulse in Tx and Rx directions respectively. If
independent clock is used, TSCK[i] and RSCK[i] are used as Tx clock
and Rx clock respectively, and TSF[i] and RSF[i] are used as the frame
pulse in Tx and Rx directions respectively.
3.2.1.4 Mode7~Mode10
8.192 MHz clock in Tx and Rx directions respectively, and TSCFS and
RSCFS are used as common frame pulse in Tx and Rx directions
respectively. All the TSCK[i], TSF[i], RSCK[i] and RSF[i] pins are not
used and should be connected to ground. The unused RSD pins should
also be connected to ground.
Multi-rate
speed stream.
into a single 8.192 MHz stream through one data pin. The multiplexing
uses the round-robin technology. The system provides 8.192 MHz
common clock and 8 kHz common frame pulse.
to E1 frame is first done. Then the mapped 4 E1 channels are multi-
plexed into one 8.192 MHz stream as shown in Figure-7.
Table-3 Pins Used in Multi-Rate Multiplex Mode
IDT82V2608
INTERFACE
The T1 ISDN mode corresponds to the use of 23 time slots to
In this mode, data is not transmitted during the framing bit. The other
In these modes, the transmit/receive data rate is T1 channelized, and
In these modes, the clock for Tx and Rx can be either common clock
In these modes, only TSCCK and RSCCK are used to input the
The data pins used for multiplexing are shown in the table below:
Multi-rate is used for multiplexing four E1 streams into one high-
For T1 channel, before multiplexing, a mapping from each T1 frame
22.
Tx Pin Name
TSD[1]
TSD[2]
Figure-7
shows four 2.048 MHz E1 streams multiplexed
Rx Pin Name
T1 ISDN Mode
RSD[1]
RSD[2]
and
Multiplexed Channel
channel 1~channel 4
channel 5~channel 8
T1 Normal Mode
on
22
T1 Multi-Rate Mode
described in
modes can be derived when multiplexing is further used. Again, T1
ISDN data mode and T1 normal mode can be applied, thus we have 4
more modes: mode7~mode10.
3.2.1.5 Mode11
uous 2.048 Mb/s serial stream. There is no concept of time slot in an
unchannelized link. Each eight bits are grouped into an octet. TSF or
TSCFS signal determine whether the data stream is in byte alignment or
not. The first bit received/transmitted is the most significant bit of an
octet while the last bit is the least significant bit. The 2.048 MHz data
stream clock is provided by the system.
independent clock. If common clock is used, TSCCK and RSCCK are
used as Tx clock and Rx clock respectively. If independent clock is used,
the clock for the i-th link comes from TSCK[i] and RSCK[i] in Tx and Rx
directions respectively.
ment pulse for the transmitted bit stream while in Independent Clock
Mode, the TSF[i] signal is used for byte alignment pulse for the i-th
transmit link.
TSCCK) divided by 256 and the pulse width of this signal is one cycle of
TSCK[i] or TSCCK signal.
3.2.1.6 Mode12~Mode13
signalling modes. The non-multi-rate is the channelized generic E1 inter-
face, i.e., a 2.048 MHz channel is divided into 32 sub-channels (also
called time slots), and these sub-channels are used to exchange data.
or independent clock. If common clock is used, TSCCK and RSCCK are
used as Tx clock and Rx clock respectively, and TSCFS and RSCFS are
used as common frame pulse in Tx and Rx directions respectively. If
independent clock is used, TSCK[i] and RSCK[i] are used as Tx clock
and Rx clock respectively, and TSF[i] and RSF[i] are used as the frame
pulse in Tx and Rx directions respectively.
Figure-7 Multiplexing Four 2 MHz Streams into One 8
2nd 2 Mbps stream
Since there are two T1 to E1 mapping methods that can be used as
In this mode, the transmit and receive data are viewed as a contin-
In this mode, the clock for Tx and Rx can be either common clock or
In Common Clock Mode, the TSCFS signal is used for byte align-
The frequency for TSF[i] (or TSCSF) is the result of TSCK[i] (or
These two modes are E1 non-multi-rate combined with different
In these modes, the clock for Tx and Rx can be either common clock
1st 2 Mbps stream
3rd 2 Mbps stream
4th 2 Mbps stream
8 Mbps stream
G.802 Mapping
0
Byte0
Byte0
Byte0
Byte0
1
MHz Stream
and
2
Spaced Mapping
3
Inverse Multiplexing for ATM
4
Byte1
Byte1
Byte1
Byte1
5
6
December 4, 2006
7
on
8
page
Byte2
Byte2
Byte2
Byte2
9
20, two new
10 11