ADSP-3PARCBF548M01 Analog Devices Inc, ADSP-3PARCBF548M01 Datasheet - Page 88

• Manufacturer Part Number: ADSP-3PARCBF548M01
• Description: MODULE BOARD BF548
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r

Specifications of ADSP-3PARCBF548M01

• Module/board Type: Processor Module
• For Use With/related Products: ADSP-BF548
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
sured under the conditions described in this section.
shows the measurement point for AC measurements (except
output enable/disable). The measurement point V
V
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to the point when they
start driving. The output enable time t
the point when a reference signal reaches a high or low voltage
level to the point when the output starts driving as shown in the
output enable/disable diagram
t
signal switches to the point when the output voltage reaches
either 1.75 V (output high) or 1.25 V (output low). Time t
the interval from when the output starts driving to when the
output reaches the 1.25 V or 1.75 V trip voltage. Time t
calculated as shown in the equation:
If multiple pins (such as the data bus) are enabled, the measure-
ment value is that of the first pin to start driving.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high-impedance state, and start to decay from
their output high or low voltage. The time for the voltage on the
bus to decay by ∆V is dependent on the capacitive load, C
the load current, I
equation:
The output disable time t
t
t
switches to when the output voltage decays ∆V from the mea-
sured output high or output low voltage. The time t
calculated with test loads C
ENA_MEASURED
DIS_MEASURED
DIS_MEASURED
DDEXT
OUTPUT
INPUT
/2 or V
OR
Figure 71. Voltage Reference Levels for AC Measurements
t ENA
and t
is the interval from when the reference signal
, is the interval from the point when the reference
DDDDR
V
MEAS
L
DECAY
. This decay time can be approximated by the
(Except Output Enable/Disable)
t
/2, depending on the pin under test.
=
DECAY
t ENA_MEASURED t TRIP
as shown in
DIS
L
is the difference between
and I
=
(Figure
(
C
L
, and with ∆V equal to 0.25 V.
L
Figure
∆
V
ENA
72). The time,
) I
⁄
is the interval from
–
72. The time
L
Rev. C | Page 88 of 100 | February 2010
MEAS
DECAY
Figure 71
V
is
MEAS
ENA
is
L
TRIP
is
and
is
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
to be the difference between the ADSP-BF54x Blackfin proces-
sors’ output voltage and the input threshold for the device
requiring the hold time. A typical ∆V will be 0.4 V. C
bus capacitance (per data line), and I
three-state current (per data line). The hold time will be t
plus the minimum disable time (for example, t
chronous memory write cycle).
CAPACITIVE LOADING
Output delays and holds are based on standard capacitive loads
of an average of 6 pF on all balls (see
(MEASURED)
(MEASURED)
V
LOAD
NOTES:
THE WORST-CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED
FOR THE OUTPUT TIMING ANALYSIS TO REFELECT THE TRANSMISSION LINE
EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD), IS FOR
LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.
ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN
SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM MAY INCORPORATE
EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.
4pF
t
DIS
V
V
OH
OL
OUTPUT STOPS DRIVING
Figure 73. Equivalent Device Loading for AC Measurements
50
70
50
400
DECAY
2pF
REFERENCE
t
V
Figure 72. Output Enable/Disable
V
DIS_MEASURED
OH
OL
SIGNAL
using the equation given above. Choose ∆V
t
(MEASURED)
DECAY
(MEASURED) + V
(Includes All Fixtures)
45
0.5pF
HIGH IMPEDANCE STATE
TESTER PIN ELECTRONICS
t
ENA
V
ZO = 50 (impedance)
TD = 4.04
L
Figure
OUTPUT STARTS DRIVING
is the total leakage or
T1
73).
1.18 ns
t
ENA_MEASURED
V
V
DDAT
TRIP
TRIP
t
TRIP
(LOW)
V
(HIGH)
V
OH
OL
for an asyn-
L
(MEASURED)
(MEASURED)
is the total
OUTPUT
DUT
DECAY