FW80960VH100 Intel, FW80960VH100 Datasheet - Page 61
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FW80960VH100
Manufacturer Part Number
FW80960VH100
Description
IC MPU I960VH 3V 100MHZ 324-BGA
Manufacturer
Intel
Datasheet
1.FW80960VH100.pdf
(64 pages)
Specifications of FW80960VH100
Rohs Status
RoHS non-compliant
Processor Type
i960
Features
VH suffix, 32-Bit, 16K Cache
Speed
100MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
324-BGA
Other names
820682
Available stocks
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Preliminary Datasheet
Figure 30. HOLD/HOLDA Waveform For Bus Arbitration
NOTE: HOLD is sampled on the rising edge of P_CLK. HOLDA is granted after the latency counter in the local
bus arbiter expires. The processor asserts HOLDA to grant the bus on the same edge in which it recognizes
HOLD if the last state was T
the same edge in which it recognizes the deassertion of HOLD.
BLAST#, LOCK#/ONCE#
WIDTH/HLTD1/RETRY,
W/R#, DT/R#, DEN#,
ALE, ADS#, BE3:0#
LRDYRCV#, FAIL#
D/C#/RSTMODE#
WIDTH/HLTD1,
Outputs:
AD31:0,
HOLDA
P_CLK
HOLD
i
or the last T
r
of a bus transaction. Similarly, the processor deasserts HOLDA on
Valid
T
(Note)
I
or T
R
T
H
T
H
T
I
or T
A
Valid
80960VH
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