PSB3186FV14NP Infineon Technologies, PSB3186FV14NP Datasheet - Page 110

• Manufacturer Part Number: PSB3186FV14NP
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

Figure 63
The ISAC-SX TE indicates to the host that a new data block can be read from the
RFIFOD by means of an RPF interrupt (see previous chapter). User data is stored in the
RFIFOD and information about the received frame is available in the RBCLD and
RBCHD registers and the RSTAD byte which are listed in
The RSTAD register is always appended in the RFIFOD as last byte to the end of a
frame.
Note: The number of bytes received in RFIFOD depends on the selected receive FIFO
Data Sheet
MDS2 MDS1 MDS0
Description of Symbols:
threshold (EXMD.RFBS).
0
0
1
1
1
1
1
1
1
0
Receive Data Flow
Compared with registers
Stored in FIFO/registers
1
0
0
1
1
MODE
Non
Auto/16
Non
Auto/8
Transparent 0
Transparent 1
Transparent 2
FLAG
SAP1
SAP2
SAPG
*2)
TEI1
TEI2
*2)
SAP1
SAP2
SAPG
*2)
ADDRESS
*1) CRC optionally stored in RFIFOD if EXMD:RCRC=1
*2) Address optionally stored in RFIFOD if EXMD:SRA=1
*3) Start of the control field in case of an 8 bit address
*4) Content of RSTA register appended at the frameend into RFIFOD
ADDR
TEI1
TEI2
TEIG
*2)
*3)
TEI1
TEI2
TEIG
*2)
110
_
CONTROL DATA
CTRL
Description of Functional Blocks
RFIFOD
RFIFOD
RFIFOD
RFIFOD
RFIFOD
I
Table
STATUS
CRC
*1)
*1)
*1)
*1)
*1)
16.
RSTAD
RSTAD
RSTAD
RSTAD
RSTAD
ISAC-SX TE
FLAG
3186_13
PSB 3186
2003-01-30
*4)
*4)
*4)
*4)
*4)