PSB3186FV14NP Infineon Technologies, PSB3186FV14NP Datasheet - Page 32

• Manufacturer Part Number: PSB3186FV14NP
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

Note: If the multiplexed address/data bus type (3) is selected, the unused address pins
A read/write access to the ISAC-SX TE registers can be done in multiplexed or non-
multiplexed mode:
• In non-multiplexed mode the register address must be applied to the address bus (A0-
• In multiplexed mode the address on the address/data bus (AD0-AD7) is latched in by
The ISAC-SX TE provides two different ways to address the register contents which is
selected with the AMOD pin (’0’ = direct mode, ’1’ = indirect mode).
both register addressing modes.
Direct address mode (AMOD = ’0’): The register address to be read or written is directly
set in the way described above.
Indirect address mode (AMOD = ’1’): Only the LSB of the address is used to select
either the address register (A0 = ’0’) or the data register (A0 = ’1’). The microcontroller
writes the register address to the ADDRESS register before it reads/writes data from/to
the corresponding DATA register.
In indirect address mode the ISAC-SX TE evaluates no address line except the least
significant address bit. The remaining address lines must not be left open but have to be
tied to logical ’1’.
Figure 7
Data Sheet
A7) for the data access via the data bus (AD0-AD7).
ALE before a data read/write access via the same bus is performed.
A0-A7 must be tied to V
Direct/Indirect Register Address Mode
Indirect Address Mode
Address
A0
MODE2:AMOD=1
1h
0h
ADDRESS
DD
AD0-7
DATA
Data
.
32
Direct Address Mode
Address
A0-7
Address
MODE2:AMOD=0
Description of Functional Blocks
8Eh
8Fh
01h
00h
:
:
AD0-7
Data
Data
21150_11
Figure 7
ISAC-SX TE
PSB 3186
2003-01-30
illustrates