PSB3186FV14NP Infineon Technologies, PSB3186FV14NP Datasheet - Page 9

• Manufacturer Part Number: PSB3186FV14NP
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

List of Figures
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Data Sheet
Example for Monitoring Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Interrupt Structure of the Synchronous Data Transfer . . . . . . . . . . . . . 79
Examples for the Synchronous Transfer Interrupt Control with one
Enabled STIxy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Data Strobe Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Strobed IOM-2 Bit Clock. Register SDS_CONF programmed to 01H . 84
Examples of MONITOR Channel Applications in IOM -2 TE Mode . . . 85
MONITOR Channel Protocol (IOM-2) . . . . . . . . . . . . . . . . . . . . . . . . . 87
Monitor Channel, Transmission Abort requested by the Receiver. . . . 90
Monitor Channel, Transmission Abort requested by the Transmitter. . 90
Monitor Channel, Normal End of Transmission . . . . . . . . . . . . . . . . . . 90
MONITOR Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
CIC Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Applications of TIC Bus in IOM-2 Bus Configuration . . . . . . . . . . . . . . 96
Structure of Last Octet of Ch2 on DU . . . . . . . . . . . . . . . . . . . . . . . . . 97
Structure of Last Octet of Ch2 on DD . . . . . . . . . . . . . . . . . . . . . . . . . 98
D-Channel Access Control on the S-Interface . . . . . . . . . . . . . . . . . . . 99
Deactivation of the IOM-2 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Activation of the IOM-2 interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
RFIFO Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Data Reception Procedures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Reception Sequence Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Receive Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Data Transmission Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Transmission Sequence Example . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Transmit Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Interrupt Status Registers of the HDLC Controllers . . . . . . . . . . . . . . 118
Layer 2 Test Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Register Mapping of the ISAC-SX TE . . . . . . . . . . . . . . . . . . . . . . . . 121
Oscillator Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Input/Output Waveform for AC Tests . . . . . . . . . . . . . . . . . . . . . . . . . 176
IOM-2 Timing (TE mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Definition of Clock Period and Width . . . . . . . . . . . . . . . . . . . . . . . . . 178
SCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
Microprocessor Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
Microprocessor Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Microprocessor Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Microprocessor Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Reset Signal RES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
9
ISAC-SX TE
PSB 3186
2003-01-30
Page