PEB3086FV14XT Lantiq, PEB3086FV14XT Datasheet - Page 104

• Manufacturer Part Number: PEB3086FV14XT
• Manufacturer: Lantiq

Specifications of PEB3086FV14XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 10
STI
xy
-
xy
xy
xy
xy
xy
An STOV interrupt is not generated if all stimulating STI interrupts are acknowledged.
An STIxy must be acknowledged by setting the ACKxy bit in the ASTI register until two
BCL clocks (for DPS=’0’) or one BCL clocks (for DPS=’1’) before the time slot which is
selected for the appropriate STIxy.
The interrupt structure of the synchronous transfer is shown in
.
Figure 54
Data Sheet
0
0
0
0
0
0
; xy
; xy
; xy
1
1
1
Interrupt
TRAN
MASK
Enabled Interrupts
WOV
MOS
ICD
ICB
CIC
ST
(Register MSTI)
Examples for Synchronous Transfer Interrupts
Interrupt Structure of the Synchronous Data Transfer
STOV
-
xy
xy
xy
xy
xy
xy
0
1
0
0
1
0
TRAN
ISTA
WOV
MOS
ICD
; xy
; xy
; xy
ICB
CIC
ST
1
1
1
; xy
2
STI
xy
-
xy
xy
xy
xy
xy
xy
xy
xy
STOV20
STOV21
STOV11
STOV10
0
0
0
0
1
0
1
0
1
MSTI
STI20
STI11
STI10
STI21
104
Generated Interrupts
(Register STI)
Description of Functional Blocks
STOV
-
-
xy
xy
xy
xy
-
xy
xy
xy
STOV10
STOV20
STOV11
STOV21
1
0
0
1
1
0
1
STI21
STI20
STI11
STI10
STI
; xy
; xy
; xy
1
2
2
Figure
54.
ACK10
ACK11
Example 1
Example 2
Example 3
Example 4
Example 5
Example 6
Example 7
ACK21
ACK20
ASTI
PEB 3086
2003-01-30
ISAC-SX