PEB3086FV14XT Lantiq, PEB3086FV14XT Datasheet - Page 39

PEB3086FV14XT

Manufacturer Part Number
PEB3086FV14XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3086FV14XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
3.2.3
Special events in the device are indicated by means of a single interrupt output, which
requests the host to read status information from the device or transfer data from/to the
device.
Since only one interrupt request pin (INT) is provided, the cause of an interrupt must be
determined by the host reading the interrupt status registers of the device.
The structure of the interrupt status registers is shown in
Figure 8
Data Sheet
MASK
TRAN
MOS
AUX
Interrupt
CIC
ICD
ICB
ST
Interrupt Structure
Interrupt Status and Mask Registers
TRAN
ISTA
MOS
AUX
ICB
CIC
ICD
ST
MASKB
MASKD
RME
RFO
XDU
RME
RFO
XMR
XDU
RPF
XPR
RPF
XPR
B-channel
D-channel
ISTAB
ISTAD
RME
RFO
XDU
RME
RFO
XMR
XDU
RPF
XPR
RPF
XPR
STOV21
STOV20
STOV11
STOV10
MSTI
STI21
STI20
STI11
STI10
39
STOV21
STOV20
STOV11
STOV10
MOCR
STI21
STI20
STI11
STI10
MRE
MIE
STI
MASKTR
SQW
SQC
RIC
LD
Description of Functional Blocks
ACK21
ACK20
ACK11
ACK10
ASTI
ISTATR
MOSR
SQW
MDR
SQC
MER
MDA
MAB
RIC
LD
Figure
8.
CIX1
CI1E
AUXM
EAW
WOV
TIN2
TIN1
INT1
INT0
CIR0
CIC0
CIC1
3086_16.vsd
PEB 3086
WOV
EAW
AUXI
TIN2
TIN1
INT1
INT0
2003-01-30
ISAC-SX

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