PSB21383H-V13 Infineon Technologies, PSB21383H-V13 Datasheet - Page 103

• Manufacturer Part Number: PSB21383H-V13
• Manufacturer: Infineon Technologies

Specifications of PSB21383H-V13

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

2.3.12
The receiver consists of a differential input stage, a peak detector and a set of
comparators. Additional noise immunity is achieved by digital oversampling after the
comparators. A simplified equivalent circuit of the receiver is shown in figure 57.
Figure 57
Equivalent Internal Circuit of the Receiver Stage
The input stage works together with external 10 k
to the internal thresholds. The data detection threshold Vref is continuously adapted
between a maximal (Vrefmax) and a minimal (Vrefmin) reference level related to the line
level. The peak detector requires maximum 2 s to reach the peak value while storing
the peak level for at least 250 s (RC > 1 ms).
The additional level detector for power up/down control works with a fixed threshold
VrefLD. The level detector monitors the line input signals to detect whether an INFO is
present. When closing the internal local loop it is therefore possible to indicate an
incoming signal during activated loop.
In order to additionally reduce the bit error rate in severe conditions, the SCOUT
performs oversampling of the received signal and uses majority decision logic. The
receive signal is sampled at 7.68MHz clock intervals (XTAL).
Data Sheet
Receiver Characteristics
100 kOhm
93
resistors to match the input voltage
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12