PSB21383H-V13 Infineon Technologies, PSB21383H-V13 Datasheet - Page 93

• Manufacturer Part Number: PSB21383H-V13
• Manufacturer: Infineon Technologies

Specifications of PSB21383H-V13

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

2.3.7.1.3 C/I Commands
Note: In the activated states (AI8, AI10 or AIL indication) the 2B+D channels are only
2.3.7.1.4 Receive Infos on S/T (Downstream)
Data Sheet
Command
Activation Request with
priority class 8
Activation Request with
priority class 10
Activation Request Loop ARL
Deactivation Indication
Reset
Timing
Test mode 1
Test mode 2
Name
info 0
info 2
info 4
info X
transferred transparently to the S/T interface if one of the three “Activation
Request” commands is issued.
i0
i2
i4
ix
Abbr. Description
Abbr. Code Remark
AR8
AR10 1001 Activation requested by the SCOUT, D-
DI
RES
TIM
TM1
TM2
No signal on S/T
4 kHz frame
A=’0’
4 kHz frame
A=’1’
Any signal except info 2 or info 4
1000 Activation requested by the SCOUT, D-
1010 Activation requested for the internal or
1111 Deactivation Indication
0001 Reset of the layer-1 statemachine
0000 Layer-2 device requires clocks to be
0010 One AMI-coded pulse transmitted in each
0011 AMI-coded pulses transmitted continuously,
channel priority set to 8 (see note)
channel priority set to 10 (see note)
external Loop A (see note).
For a non transparent internal loop bit
DIS_TX of register TR_CONF2 has to be set
to ’1’ additionally.
activated
frame, resulting in a frequency of the
fundamental mode of 2 kHz
resulting in a frequency of the fundamental
mode of 96 kHz
83
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12