PSB21383H-V13 Infineon Technologies, PSB21383H-V13 Datasheet - Page 13

• Manufacturer Part Number: PSB21383H-V13
• Manufacturer: Infineon Technologies

Specifications of PSB21383H-V13

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Data control and
manipulation
IOM-2
IOM-2 Interface
Monitor channel
programming
C/I channels
Layer-1 statemachine
Statemachine in software
IDSL (144kBit/s)
HDLC support
FIFO size
Reset Sources
Codec
Analog inputs
Band gap reference
Data Sheet
SCOUT
Various possibilities of data
control and data
manipulation (enable/
disable, shifting, looping,
switching)
Double clock (DCL),
bit clock pin (BCL),
serial data strobe 1 (SDS1)
serial data strobe 2 (SDS2/
RSTO)
Provided
(MON0, 1 or 2)
CI0 (4bits),
CI1 (4/6bits)
With changes in ISAC-S for
correspondence with the
actual ITU Specification
Possible
Provided (HDLC, SDS)
D- and B- channels;
Non-auto mode,
transparent mode 0-2,
extended transparent mode
64 bytes per direction with
programmable FIFO
thresholds
RST Input
Watchdog
C/I Code Change
EAW Pin
Software Reset
1 single ended, 2 differential 1 single ended, 2
Externally buffered
3
ISAC-S TE / ARCOFI
B- and IC-channel looping
Double clock (DCL),
bit clock (BCL),
serial data strobe (SDS)
Provided
(MON0 or 1)
CI0 (4bits),
CI1 (6bits)
Not possible
Not provided
D-channels;
auto mode,
non-auto mode,
transparent mode 1-3
2x32 bytes per direction
RST Input
Watchdog
C/I Code Change
EAW Pin
differential
Internally buffered
PSB 21381/2
PSB 21383/4
2001-03-12
Overview