PSB21383H-V13 Infineon Technologies, PSB21383H-V13 Datasheet - Page 97

• Manufacturer Part Number: PSB21383H-V13
• Manufacturer: Infineon Technologies

Specifications of PSB21383H-V13

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

2.3.7.2
Instead of using the integrated layer-1 statemachine it is also possible to implement the
layer-1 statemachine completely in software.
The internal layer-1 statemachine can be disabled by setting the L1SW bit in the
TR_CONF0 register to ’1’.
The transmitter is completely under control of the microcontroller via register TR_CMD ).
The status of the receiver is stored in register TR_STA and has to be evaluated by the
microcontroller. This register is updated continuously. If not masked a RIC interrupt is
generated by any change of the register contents. The interrupt is cleared after a read
access to this register.
Data Sheet
External Layer-1 Statemachine
87
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12