MC145574APB Freescale Semiconductor, MC145574APB Datasheet - Page 51

• Manufacturer Part Number: MC145574APB
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574APB

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
S(2:0), OR5(b2, b1, b0)
These three bits select the GCI timeslot that the device will use. S(2:0)=0 is the default state, timeslot 0.
The timeslot selected must be compatible with the DCL clock rate being used (i.e., if the clock rate
is 2048 kHz, only the first four timeslots are available).
FSC
This is an input/output pin to which all serial interface events are synchronized. This pin is periodic
at 8 kHz/125 s. In the master mode, the pin is an output and is either derived from the S/T frame
or from XTAL. In the slave mode, the pin is an input.
DCL
This is an input/output pin that provides the clock to the serial interface. In the master mode, this pin
is an output; and in the slave mode, it is an input. The clock is continuous and is synchronous with
the frame sync. The clock rate for GCI is double the bit rate (i.e., two clocks per data bit).
When programmed as an input, the clock rate can be any multiple of 16 kHz between 512 and
4096 kHz.
When programmed as an output, the clock rate can be selected via the SCP GCI control register
to be either 2048, 1536, or 512 kHz.
D in
This pin is always an input. Data to be output on the S/T–interface is input on this pin during the pro-
grammed timeslots. This pin is also the input for the monitor and C/I channels of the GCI frame.
D out
This pin is an open drain output and requires an external pull–up resistor. This output can be wire–OR’d
with other GCI devices. Data received on the S/T–interface is output on this pin during the programmed
timeslot and is high impedance at all other times. This pin is also the output for the monitor and C/I
channels of the GCI frame.
OR5(b2)
Table 6–2. GCI Timeslot Assignment
S2
0
0
0
0
1
1
1
1
MC145574
OR5(b1)
S1
0
0
1
1
0
0
1
1
OR5(b0)
S0
0
1
0
1
0
1
0
1
Timeslot
0
1
2
3
4
5
6
7
6–5