DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 19

• Manufacturer Part Number: DS1877T+
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+000

Figure 10. DAC Offset LUTs
Figure 11. Logic Diagram
LOS1
LOS2
INVLOS1
INVLOS2
1023
767
511
255
0
LOS LO1
LOS LO2
RSEL
-40°C
INX
EACH OFFSET REGISTER CAN BE INDEPENDENTLY
SET BETWEEN 0 AND 1020. 1020 = 4 x FFh. THIS
EXAMPLE ILLUSTRATES POSITIVE TEMPCO.
DAC
BITS
LUT
F8h
7:0
-8°C
LOSC1
LOSC2
MUX
MUX
BITS
DAC
RSELC
F9h
LUT
DAC OFFSET LUTs (04h)[A2h/B2h]
7:0
INXC
INXS
RSELS
EIGHT REGISTERS PER DAC
+8°C
BITS
DAC
FAh
LUT
7:0
INVRSOUT
+24°C +40°C +56°C +70°C +88°C +104°C
INVOUTX
SFP Controller for Dual Rx Interface
INVLOSOUT
DAC
BITS
FBh
LUT
7:0
DAC
BITS
FCh
LUT
7:0
RXL
= PINS
DAC
BITS
FDh
LUT
7:0
DAC
BITS
LUT
FEh
7:0
LOSOUT
OUTX
RSELOUT
BITS
DAC
FFh
LUT
7:0
Four digital input pins and four digital output pins are
provided for monitoring and control.
When LOSC_ = 0 (Table 02h, Register 8Ah), the LOS_
pin is used to convert a standard comparator output for
LOS to an open-collector output. The output of the mux
can be read in the STATUS register (Lower Memory,
Register 6Eh) as the RXL bit. The RXL signal can be
inverted (INVLOS_ = 1) before driving the open-drain
output transistor using the XOR gate provided. Setting
LOSC_ = 1 configures the mux to be controlled by the
LOS LO QT alarm. The mux setting (stored in EEPROM)
does not take effect until V
EEPROM to recall.
Digital input pins INX and RSEL primarily serve to meet
the rate-select requirements of SFP and SFP+. They
can also serve as general-purpose inputs. OUTX and
RSELOUT are driven by a combination of the INX, RSEL,
and logic dictated by control registers in the EEPROM
(see Figure 11). The levels of INX and RSEL can be read
from the STATUS register (Lower Memory, Register 6Eh).
The open-drain output OUTX can be controlled and/or
inverted using the CNFGB register (Table 02h, Register
89h). The open-drain RSELOUT output is software con-
trolled and/or inverted through the STATUS register and
1023
767
511
255
0
-40°C
EACH OFFSET REGISTER CAN BE INDEPENDENTLY SET BETWEEN
0 AND 1020. 1020 = 4 x FFh. THIS EXAMPLE ILLUSTRATES POSITIVE
AND NEGATVE TEMPCO.
DAC
BITS
LUT
F8h
7:0
-8°C
DAC
BITS
LUT
F9h
DAC OFFSET LUTs (04h)[A2h/B2h]
7:0
EIGHT REGISTERS PER DAC
+8°C
DAC
BITS
LUT
FAh
7:0
+24°C +40°C +56°C +70°C +88°C +104°C
BITS
DAC
FBh
LUT
7:0
INX, RSEL, OUTX, RSELOUT
LOS1, LOS2, and LOSOUT
BITS
DAC
FCh
LUT
7:0
CC
> POA, allowing the
DAC
BITS
FDh
LUT
7:0
Digital I/O Pins
DAC
BITS
LUT
FEh
7:0
DAC
BITS
LUT
FFh
7:0
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