DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 43

• Manufacturer Part Number: DS1877T+
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+000

Table 01h, Register FDh–FFh: RESERVED
Table 02h, Register 80h: MODE
80h
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
BITS 5, 4,
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
These registers are reserved.
SEEB
BIT 7
BIT 7
BIT 6
BIT 3
BIT 2
1, 0
SEEB:
0 = (default) Enables EEPROM writes to SEE bytes.
1 = Disables EEPROM writes to SEE bytes during configuration, so that the configuration of the part
is not delayed by the EE cycle time. Once the values are known, write this bit to a 0 and write the
SEE locations again for data to be written to the EEPROM.
DAC2EN:
0 = DAC2 VALUE is writable by the user and the LUT recalls are disabled. This allows users to
interactively test their modules by writing the values for DAC2. The output is updated with the new
value at the end of the write cycle. The I
1 = (default) Enables automatic control of the LUT for DAC2 VALUE.
RESERVED
AEN:
0 = The temperature-calculated index value TINDEX is writable by the user and the updates of cal-
culated indexes are disabled. This allows the user to interactively test the modules by controlling
the indexing for the LUTs. The recalled values from the LUTs appear in the DAC registers after the
next completion of a temperature conversion.
1 = (default) The temperature-calculated index value TINDEX is used to control the LUTs.
DAC1EN:
0 = DAC1 VALUE is writable by the user and the LUT recalls are disabled. This allows the user to
interactively test their modules by writing the values for DAC1. The output is updated with the new
value at the end of the write cycle. The I
1 = (default) Enables automatic control of the LUT for DAC1 VALUE.
DAC2EN
SFP Controller for Dual Rx Interface
7Fh
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory locations
Volatile
RESERVED
00h
N/A
N/A
N/A
N/A
RESERVED
2
2
C STOP condition is the end of the write cycle.
C STOP condition is the end of the write cycle.
AEN
Table 02h Register Descriptions
DAC1EN
RESERVED
RESERVED
BIT 0
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