DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 47

• Manufacturer Part Number: DS1877T+
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+000

Table 02h, Register 8Ah: CNFGC
Table 02h, Register 8Bh: DEVICE ADDRESS
8Ah
8Bh
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
This value becomes the I
set. If A0h/B0h is programmed to this register, the auxiliary memory is disabled. For example, writing xxxx_010x
makes the main device addresses A4h and B4h.
RESERVED
RESERVED
BITS 7, 3
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 2
BIT 1
BIT 0
SFP Controller for Dual Rx Interface
RESERVED
TXD_RST EN DAC2:
0 = TXDC2 has no effect on DAC2.
1 = DAC2 is reset by TXDC2.
LOSC2: See Figure 11.
0 = LOS2 LO QT drives LOSOUT logic.
1 = LOS2 input pin drives LOSOUT logic.
INVLOS2: See Figure 11.
0 = (default) LOS2 input is not inverted.
1 = LOS2 input is inverted.
TXD_RST EN DAC1: See Figure 11.
0 = TXDC1 has no effect on DAC1.
1 = DAC1 is reset by TXDC1.
LOSC1: See Figure 11.
0 = LOS1 LO QT drives LOSOUT logic.
1 = LOS1 input pin drives LOSOUT logic.
INVLOS1: See Figure 11.
0 = (default) LOS1 input is not inverted.
1 = LOS1 input is inverted.
RESERVED
EN DAC2
TXD_RST
2
C slave address for the main memory when the ASEL bit (Table 02h, Register 88h) is
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory locations
Nonvolatile (SEE)
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory locations
Nonvolatile (SEE)
RESERVED
LOSC2
INVLOS2
RESERVED
RESERVED
2
3
TXD_RST
EN DAC1
2
2
LOSC1
2
1
RESERVED
INVLOS1
BIT 0
BIT 0
47