DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 54

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DS1877T+

Manufacturer Part Number
DS1877T+
Description
IC CTLR/MON SFP 1-2CH 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP+ Controllerr
Datasheet

Specifications of DS1877T+

Input Type
Logic
Output Type
Logic
Interface
I²C
Current - Supply
2.5mA
Mounting Type
Surface Mount
Package / Case
28-WFQFN exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
90-1877T+000
SFP Controller for Dual Rx Interface
Table 02h, Register BBh: LLOS2
Table 02h, Register B9h: RESERVED
Table 02h, Register BAh: HLOS2
54
BAh
BBh
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
This register is reserved.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
Fast comparison DAC threshold adjust for high LOS2. The combination of HLOS2 and LLOS2 creates a hys-
teresis comparator. As RSSI2 falls below the LLOS2 threshold, the LOS2 LO alarm bit is set to 1. The LOS2 LO
alarm remains set until the RSSI2 input is found above the HLOS2 threshold setting, which clears the LOS2 LO
alarm bit and sets the LOS2 HI alarm bit.
Fast comparison DAC threshold adjust for low LOS2. See HLOS2 (Table 02h, Register BAh) for the functional
description.
BIT 7
BIT 7
2
2
7
7
2
2
6
6
00h
N/A
N/A
N/A
N/A
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and QT2EN = 0) or (PW1 and RWTBL2 and QT2EN = 0)
Common A2h and B2h memory locations
Nonvolatile (SEE)
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and QT2EN = 0) or (PW1 and RWTBL2 and QT2EN = 0)
Common A2h and B2h memory locations
Nonvolatile (SEE)
2
2
5
5
2
2
4
4
2
2
3
3
2
2
2
2
2
2
1
1
BIT 0
BIT 0
2
2
0
0

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