DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 35

• Manufacturer Part Number: DS1877T+
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+000

Lower Memory, Register 6Eh: STATUS
Access
Write
6Eh
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
RESERVED
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
N/A
<5/D>
RESERVED
TXDC1 [A2h]: TXD1 software control bit (writable by all users).
0 = (default) This bit has no effect on alarms and warnings.
1 = Setting TXDC1 inhibits the latching of low alarms and warnings LOS1 LO, LOS2 LO, RSSI1
LO, and RSSI2 LO after the condition is cleared. Once TXDC1 is set, it is internally extended by
time t
latching of these alarms and warnings.
TXDC2 [B2h]: TXD2 software control bit (writable by all users).
0 = (default) This bit has no effect on alarms and warnings.
1 = Setting TXDC2 inhibits the latching of low alarms and warnings LOS1 LO, LOS2 LO, RSSI1
LO, and RSSI2 LO after the condition is cleared. Once TXDC2 is set, it is internally extended by
time t
latching of these alarms and warnings.
INXS [A2h or B2h]: INX status bit. Reflects the logic state of the INX pin (read-only).
0 = INX pin is logic-low.
1 = INX pin is logic-high.
RSELS [A2h or B2h]: RSEL status bit. Reflects the logic state of the RSEL pin (read-only).
0 = RSEL pin is logic-low.
1 = RSEL pin is logic-high.
RSELC [A2h or B2h]: RSEL software control bit. This bit allows for software control that is iden-
tical to the RSEL pin. Its value is wire-ORed with the logic value of the RSEL pin to create the
RSELOUT pin’s logic value (writable by all users).
0 = (default)
1 = Forces the device into a RSEL state regardless of the value of the RSEL pin.
FLTS: Reflects the driven state of the FAULT pin (read-only).
0 = FAULT pin is low.
1 = FAULT pin is high.
RXL1 [A2h]: Status of LOS1 pin or LOS1 LO as determined by the LOSC control bit.
RXL2 [B2h]: Status of LOS2 pin or LOS2 LO as determined by the LOSC control bit.
RDYB [A2h or B2h]: Ready bar.
0 = V
1 = V
SFP Controller for Dual Rx Interface
All
INITR
INITR
CC
CC
TXDC
is above POA.
is below POA and/or too low to communicate over the I
to allow for settings to stabilize. Clearing TXDC1 before t
to allow for settings to stabilize. Clearing TXDC2 before t
X0XX 0XXXb
All
See below
Mixture of common memory locations and different memory locations (see below)
Volatile
<2/C>
N/A
INXS
<2/C>
All
RSELS
<5/C>
All
RSELC
<2/C>
N/A
2
FLTS
C bus.
INITR
INITR
has no impact on the
has no impact on the
<2/D>
N/A
RXL
<2/C>
BIT 0
N/A
RDYB
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