M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 183

• Manufacturer Part Number: M28529G-12
• Description: ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of M28529G-12

• Package: 484BGA
• Utopia Type: Level 2
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.71|3.135 V
• Maximum Operating Supply Voltage: 1.89|3.465 V
• Maximum Output Rate: 8.192 Mbps

2.2.32
The RXIDL4 register contains the fourth byte of the Receive Idle Cell Header. (See 0x20—RXIDL1.)
2.2.33
The IDLMSK1 register contains the first byte of the Receive Idle Cell Mask. It modifies ATM cell screening, which
compares the Receive Idle Cell Header Registers to the incoming cells. Setting a bit in the Mask Register causes
the corresponding bit in the received ATM idle cell header to be disregarded for screening. For example, setting
IDLMSK1 bit 0 to 1 causes cells to be accepted as ATM idle cells with either 1 or 0 in the octet 1, bit 0 position. This
header consists of 32 bits divided among four registers.
28529-DSH-001-K
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0x23—RXIDL4 (Receive Idle Cell Header Control Register 4)
0x24—IDLMSK1 (Receive Idle Cell Mask Control Register 1)
RxIdl4[7]
RxIdl4[6]
RxIdl4[5]
RxIdl4[4]
RxIdl4[3]
RxIdl4[2]
RxIdl4[1]
RxIdl4[0]
IdlMsk1[7]
IdlMsk1[6]
IdlMsk1[5]
IdlMsk1[4]
IdlMsk1[3]
IdlMsk1[2]
IdlMsk1[1]
IdlMsk1[0]
Name
Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
These bits hold the Receive Idle cell header for Octet 4 of the incoming cell.
These bits hold the Receive Idle cell header mask for Octet 1 of the incoming cell.
®
Description
Description
Registers
168