M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 207

• Manufacturer Part Number: M28529G-12
• Description: ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of M28529G-12

• Package: 484BGA
• Utopia Type: Level 2
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.71|3.135 V
• Maximum Operating Supply Voltage: 1.89|3.465 V
• Maximum Output Rate: 8.192 Mbps

2.4.7
2.4.8
2.4.9
2.4.10
This register is used to specify a port number for observation of link differential delay and anomalies. The contents
of this register are used to report the link information via registers 0x809–0x80B. Bit 5 of this register is read-only.
2.4.11
This register, along with bit 5 of address 0x809, reports the value of the SRAM write phase at the time when the
read phase is 0. This phase information is used to calculate the link differential delay.
28529-DSH-001-K
7–0
6–4
3–0
7–0
4–0
Bit
Bit
Bit
Bit
7
7
6
5
Default
Default
Default
Default
0x00
0x00
0x00
—
—
—
0
0
0
0x806—IMA_MEM_HI_TEST (IMA Memory Test Address (Bits 8–15))
0x807—IMA_MEM_TEST_CTL (IMA Memory Test Control / Address MSBs)
0x808—IMA_MEM_TEST_DATA (IMA Memory Test Data)
0x809—IMA_LNK_DIAG_CTL (IMA Link Diagnostic Control Register)
0x80A—IMA_LNK_DIFF_DEL (IMA Link Differential Delay Write Counter)
Memory Test Address
Memory Test Address
Bit 20
RAM Test Access
Memory Test Address
Bits 19–16
Memory Test Data
Link Delay Write
Counter
Link Diagnostic PHY
Address
Name
Name
Name
Name
—
—
Mindspeed Proprietary and Confidential
Mindspeed Technologies
This field contains the middle significant bits of the memory test address for the selected
memory component. Range: 0x00–0xFF
This field contains the most significant bit of the memory test address for the selected memory
component.
0 = no test selected, normal operation
1 = SRAM Test
2–7 = Reserved
This field contains the most significant bits of the memory test address for the selected memory
component. Range: 0x00–0x0F
This field contains the data to be written or read from the memory test address for the selected
memory component. Range: 0x00–0xFF
Reserved. Set to 0
Reserved. Set to 0
This field contains the most significant bit of the SRAM write counter for the diagnostic link
(selected using the field below).
This field contains the PHY Cell Bus Address of the port for which a diagnostic measurement is
to be performed. Range: 0x00–0x1F
®
Description
Description
Description
Description
Registers
192