CS4525-CNZ Cirrus Logic Inc, CS4525-CNZ Datasheet - Page 33

• Manufacturer Part Number: CS4525-CNZ
• Description: IC AMP AUDIO PWR 30W QUAD 48QFN
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZ

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Package / Case: 48-QFN
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 30 W
• Thd Plus Noise: 10 %
• Operating Supply Voltage: 2.5 V to 5 V
• Supply Current: 54 mA
• Maximum Power Dissipation: 180 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio - Load Impedance: 4 Ohms, 6 Ohms, 8 Ohms
• Audio Load Resistance: 8 Ohms, 4 Ohms
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.375 V
• Amplifier Class: D
• No. Of Channels: 4
• Supply Voltage Range: 8V To 18V
• Load Impedance: 4ohm
• Operating Temperature Range: 0°C To +70°C
• Amplifier Case Style: QFN
• No. Of Pins: 48
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1264

DS726PP2
6.1.4.6
The CS4525 implements 5 fully programmable parametric EQ filters.
The filters are implemented in the bi-quad form shown below.
This architecture is represented by the equation shown below where y[n] represents the output sample
value and x[n] represents the input sample value.
The coefficients are represented in binary form by 24-bit signed values stored in 3.21 two’s complement
format. The 3 MSB’s represent the sign bit and the whole-number portion of the decimal coefficient, and
the 21 LSB’s represent the fractional portion of the decimal coefficient. The coefficient values must be in
the range of -4.00000 decimal (80 00 00 hex) to 3.99996 decimal (7F FF FF hex).
The binary coefficient values are stored in registers 0Ah - 54h. Each 24-bit coefficient is split into 3 bytes,
each of which is mapped to an individually accessible register location. See the
ence” section beginning on page 66
By default, all b
plements a pass-through function.
The parametric equalizers be independently enabled and disabled for channels A and B with the En-
ChAPEq and EnChBPEq bits located in the EQ Config register.
Referenced Control
EnChAPEq ..........................
EnChBPEq ..........................
x[n]
Parametric EQ
0
coefficients are set to 1 decimal, and all other coefficients are set to 0 decimal. This im-
Register Location
“Enable Channel A Parametric EQ (EnChAPEq)” on page 79
“Enable Channel B Parametric EQ (EnChBPEq)” on page 79
y[n] = b
Z
Z
-1
-1
0
Figure 16. Bi-Quad Filter Architecture
x[n] + b
Equation 1. Bi-Quad Filter Equation
b
b
b
0
1
2
for the specific register locations for each coefficient.
1
x[n-1] + b
2
x[n-2] + a
1
y[n-1] + a
a
a
1
2
2
y[n-2]
Z
Z
-1
-1
“Register Quick Refer-
y[n]
CS4525
33