CS4525-CNZ Cirrus Logic Inc, CS4525-CNZ Datasheet - Page 55

• Manufacturer Part Number: CS4525-CNZ
• Description: IC AMP AUDIO PWR 30W QUAD 48QFN
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZ

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Package / Case: 48-QFN
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 30 W
• Thd Plus Noise: 10 %
• Operating Supply Voltage: 2.5 V to 5 V
• Supply Current: 54 mA
• Maximum Power Dissipation: 180 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio - Load Impedance: 4 Ohms, 6 Ohms, 8 Ohms
• Audio Load Resistance: 8 Ohms, 4 Ohms
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.375 V
• Amplifier Class: D
• No. Of Channels: 4
• Supply Voltage Range: 8V To 18V
• Load Impedance: 4ohm
• Operating Temperature Range: 0°C To +70°C
• Amplifier Case Style: QFN
• No. Of Pins: 48
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1264

DS726PP2
6.2.3
6.2.4
6.2.2.2
1. Bring MUTE low to mute the device’s outputs and minimize audible pops.
2. Bring RST low to halt the operation of the device.
3. Remove power.
Input Source Selection
The CS4525 can accept analog or digital audio input signals. Digital audio input signals are supplied
through the serial audio input port as outlined in
signals are supplied through the internal ADC as outlined in
is selected by the ADC/SP pin as shown in
ing any audible pops or clicks.
In hardware mode, the serial audio input port supports both I²S and left-justified formats. The serial audio
interface format is selected by the I2S/LJ pin as shown in
PWM Channel Delay
In hardware mode, the CS4525 offsets the PWM switching edges between channels as a method of man-
aging switching noise and reducing radiated emissions.
The OUT3/OUT4 signal pair is delayed from the OUT1/OUT2 signal pair by 4 SYS_CLK cycles as shown
in
Figure 23
The device’s power consumption will be brought to an absolute minimum.
ADC/SP
I2S/LJ
High
High
Low
Low
Recommended Power-Down Sequence
below. The absolute delay time is calculated by multiplying the period SYS_CLK by 4.
Figure 23. Hardware Mode PWM Output Delay
OUT1
OUT2
OUT3
OUT4
Table 15. Serial Audio Interface Format Selection
Table 14. Input Source Selection
Table 14
Selected Serial Audio Interface Format
4 x T
“Serial Audio Interfaces” on page
Digital Audio Inputs (Serial Port)
Analog Audio Inputs (ADC)
SYS_CLK
Selected Input Source
below and can be changed at any time without caus-
Left-Justified
Table 15
“Analog Inputs” on page
I²S
below.
62. Analog audio input
61. The input source
CS4525
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